On Sat, Jun 30, 2018 at 12:24 PM, Thomas Gleixner <t...@linutronix.de> wrote: > On Fri, 29 Jun 2018, Andy Shevchenko wrote: > >> As Thomas noticed there is unusual initialization is going on on Intel MID >> platforms when TSC is being calibrated. >> >> It appears that we have tsc_msr.c to support Intel MID in a more generic way. >> >> So, this patch series removes legacy calibration code and does accompanying >> clean ups. >> >> Has been tested on Intel Medfield and Intel Merrifield platforms. > > Nice series from a quick glance! I'll have a deeper look on monday. > > One thing on top. From your earlier reply: > >> This sounds like a stub against very old calibration code since Intel >> MID has no PIT, HPET, PMTIMER to calibrate from. > > As we already know that the legacy calibration cannot work on those > machines, we really should splt out the msr/cpuid based calibration method > into a separate function, which is set for the intel MID stuff and called > from native_calibrate_tsc/cpu. > > Hmm?
But that's what has been done back in 2013! By some reason, I dunno why, the same author didn't clean up it. -- With Best Regards, Andy Shevchenko
