Yogesh,
On Wed, 30 May 2018 15:14:32 +0200
Frieder Schrempf <frieder.schre...@exceet.de> wrote:
> +static void fsl_qspi_select_mem(struct fsl_qspi *q, struct spi_device *spi)
> +{
> + unsigned long rate = spi->max_speed_hz;
> + int ret, i;
> + u32 map_addr;
> +
> + if (q->selected == spi->chip_select)
> + return;
> +
> + /*
> + * In HW there can be a maximum of four chips on two buses with
> + * two chip selects on each bus. We use four chip selects in SW
> + * to differentiate between the four chips.
> + * We use the SFA1AD, SFA2AD, SFB1AD, SFB2AD registers to select
> + * the chip we want to access.
> + */
> + for (i = 0; i < 4; i++) {
> + if (i < spi->chip_select)
Can you try with:
if (i <= spi->chip_select)
and let me know if it fixes the problem you have when CS != 0?
> + map_addr = q->memmap_phy;
> + else
> + map_addr = q->memmap_phy +
> + 2 * q->devtype_data->ahb_buf_size;
> +
> + qspi_writel(q, map_addr, q->iobase + QUADSPI_SFA1AD + (i * 4));
> + }
> +
> + if (needs_4x_clock(q))
> + rate *= 4;
> +
> + fsl_qspi_clk_disable_unprep(q);
> +
> + ret = clk_set_rate(q->clk, rate);
> + if (ret)
> + return;
> +
> + ret = fsl_qspi_clk_prep_enable(q);
> + if (ret)
> + return;
> +
> + q->selected = spi->chip_select;
> +}
