On Fri, Mar 16, 2018 at 10:02:10PM +0800, Icenowy Zheng wrote: > The Allwinner H6 SoC has two pin controllers, one main controller > (called CPUX-PORT in user manual) and one controller in CPUs power > domain (called CPUS-PORT in user manual). > > This commit introduces support for the main pin controller on H6. > > The pin bank A and B are not wired out and hidden from the SoC's > documents, however it's shown that the "ATE" (an AC200 chip > co-packaged with the H6 die) is connected to the main SoC die via these > pin banks. The information about these banks is just copied from the BSP > pinctrl driver, but re-formatted to fit the mainline pinctrl driver > format. The GPIO functions are dropped, as they're impossible to use -- > except a GPIO&IRQ only pin (PB20) which might be the IRQ of ATE. > > Signed-off-by: Icenowy Zheng <icen...@aosc.io> > Acked-by: Rob Herring <r...@kernel.org>
Acked-by: Maxime Ripard <maxime.rip...@bootlin.com> Maxime -- Maxime Ripard, Bootlin (formerly Free Electrons) Embedded Linux and Kernel engineering https://bootlin.com
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