[PATCH RFC 2/2] arm64: Update device tree for ls1043a and ls1046a to enable edac driver

[York Sun]

Add edac node to enable error detection for L1 and L2 cache.

Signed-off-by: York Sun <york....@nxp.com>
---
 arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 9 +++++++++
 arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 9 +++++++++
 2 files changed, 18 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi 
b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
index d16b9cc..4fa14db 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
@@ -749,6 +749,15 @@
                };
        };
 
+       edac-a53 {
+               compatible = "arm,cortex-a53-edac";
+               cpus = <&cpu0>,
+                      <&cpu1>,
+                      <&cpu2>,
+                      <&cpu3>;
+               interrupts = <0 108 0x4>;
+       };
+
 };
 
 #include "qoriq-qman-portals.dtsi"
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi 
b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
index c8ff0ba..9095d48 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
@@ -689,6 +689,15 @@
                        no-map;
                };
        };
+
+       edac-a57 {
+               compatible = "arm,cortex-a57-edac";
+               cpus = <&cpu0>,
+                      <&cpu1>,
+                      <&cpu2>,
+                      <&cpu3>;
+               interrupts = <0 108 0x4>;
+       };
 };
 
 #include "qoriq-qman-portals.dtsi"
-- 
2.7.4