On 05/01/18 13:54, Thomas Gleixner wrote: > On Thu, 4 Jan 2018, David Woodhouse wrote: >> diff --git a/arch/x86/include/asm/cpufeatures.h >> b/arch/x86/include/asm/cpufeatures.h >> index 07cdd1715705..900fa7016d3f 100644 >> --- a/arch/x86/include/asm/cpufeatures.h >> +++ b/arch/x86/include/asm/cpufeatures.h >> @@ -342,5 +342,6 @@ >> #define X86_BUG_MONITOR X86_BUG(12) /* IPI required to >> wake up remote CPU */ >> #define X86_BUG_AMD_E400 X86_BUG(13) /* CPU is among the >> affected by Erratum 400 */ >> #define X86_BUG_CPU_INSECURE X86_BUG(14) /* CPU is insecure >> and needs kernel page table isolation */ >> +#define X86_BUG_NO_RETPOLINE X86_BUG(15) /* Placeholder: >> disable retpoline branch thunks */ > > I think this is the wrong approach. We have X86_BUG_CPU_INSECURE, which now > should be renamed to X86_BUG_CPU_MELTDOWN_V3 or something like that. It > tells the kernel, that the CPU is affected by variant 3.
MELTDOWN is variant 3. > > If the kernel detects that and has PTI support then it sets the 'pti' > feature bit which tells that the mitigation is in place. > > So what we really want is > > X86_BUG_MELTDOWN_V1/2/3 X86_BUG_MELTDOWN, X86_BUG_SPECTRE_V1, X86_BUG_SPECTRE_V2 Juergen
