Hi Kamal,
Le 22/08/2017 à 22:45, Kamal Dasu a écrit :
> Implemented and populated spi-nor mtd PM handlers for resume ops.
> spi-nor resume op re-initializes spi-nor flash to its probed
> state by calling the newly implemented spi_nor_init() function.
>
> Signed-off-by: Kamal Dasu <kdasu.k...@gmail.com>
> ---
> drivers/mtd/spi-nor/spi-nor.c | 14 ++++++++++++++
> 1 file changed, 14 insertions(+)
>
> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
> index ab98ecff..69164bc 100644
> --- a/drivers/mtd/spi-nor/spi-nor.c
> +++ b/drivers/mtd/spi-nor/spi-nor.c
> @@ -1871,6 +1871,19 @@ static int spi_nor_init(struct spi_nor *nor)
> return 0;
> }
>
> +/* mtd resume handler */
> +static void spi_nor_resume(struct mtd_info *mtd)
> +{
> + struct spi_nor *nor = mtd_to_spi_nor(mtd);
> + struct device *dev = nor->dev;
> + int ret;
> +
> + /* re-initialize the nor chip */
> + ret = spi_nor_init(nor);
> + if (ret)
> + dev_err(dev, "resume() failed\n");
> +}
> +
> int spi_nor_scan(struct spi_nor *nor, const char *name,
> const struct spi_nor_hwcaps *hwcaps)
> {
> @@ -1947,6 +1960,7 @@ int spi_nor_scan(struct spi_nor *nor, const char *name,
> mtd->size = params.size;
> mtd->_erase = spi_nor_erase;
> mtd->_read = spi_nor_read;
> + mtd->_resume = spi_nor_resume;
>
The series now looks good to me. Just waiting for Marek's
acked-by/reviewed-by to double-check.
Marek: I can't test with the Cadence QSPI controller but based on the
line "mtd->dev.parent = nor->dev;" in spi_nor_scan(), I think this patch
won't conflit with the already PM code in the cadence-quadspi.c driver.
As far as I understand, cqspi_resume() will be called before
mtd_resume() / spi_nor_resume().
Best regards,
Cyrille
> /* NOR protection support for STmicro/Micron chips and similar */
> if (JEDEC_MFR(info) == SNOR_MFR_MICRON ||
>
