Commit-ID: a24b8c3409935bbc8e3c12131c473c92692403cd
Gitweb: http://git.kernel.org/tip/a24b8c3409935bbc8e3c12131c473c92692403cd
Author: Yazen Ghannam <yazen.ghan...@amd.com>
AuthorDate: Tue, 13 Jun 2017 18:28:28 +0200
Committer: Ingo Molnar <mi...@kernel.org>
CommitDate: Wed, 14 Jun 2017 07:32:06 +0200
x86/mce/AMD: Use msr_stat when clearing MCA_STATUS
The value of MCA_STATUS is used as the MSR when clearing MCA_STATUS.
This may cause the following warning:
unchecked MSR access error: WRMSR to 0x11b (tried to write 0x0000000000000000)
Call Trace:
<IRQ>
smp_threshold_interrupt()
threshold_interrupt()
Use msr_stat instead which has the MSR address.
Signed-off-by: Yazen Ghannam <yazen.ghan...@amd.com>
Signed-off-by: Borislav Petkov <b...@suse.de>
Cc: Borislav Petkov <b...@alien8.de>
Cc: Linus Torvalds <torva...@linux-foundation.org>
Cc: Peter Zijlstra <pet...@infradead.org>
Cc: Thomas Gleixner <t...@linutronix.de>
Cc: Tony Luck <tony.l...@intel.com>
Cc: linux-edac <linux-e...@vger.kernel.org>
Fixes: 37d43acfd79f ("x86/mce/AMD: Redo error logging from APIC LVT interrupt
handlers")
Link: http://lkml.kernel.org/r/20170613162835.30750-2...@alien8.de
Signed-off-by: Ingo Molnar <mi...@kernel.org>
---
arch/x86/kernel/cpu/mcheck/mce_amd.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/x86/kernel/cpu/mcheck/mce_amd.c
b/arch/x86/kernel/cpu/mcheck/mce_amd.c
index d00f299..d11f94e 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_amd.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_amd.c
@@ -815,7 +815,7 @@ _log_error_bank(unsigned int bank, u32 msr_stat, u32
msr_addr, u64 misc)
__log_error(bank, status, addr, misc);
- wrmsrl(status, 0);
+ wrmsrl(msr_stat, 0);
return status & MCI_STATUS_DEFERRED;
}
