On 02/05/17 18:43, Laxman Dewangan wrote: > > On Tuesday 02 May 2017 08:53 PM, Jon Hunter wrote: >> On 02/05/17 15:05, Laxman Dewangan wrote: >>> The PWM hardware IP is taped-out with different maximum frequency >>> on different SoCs. >>> >>> From HW team: >>> Before Tegra186, it is 38.4MHz. >>> In Tegra186, it is 102MHz. >>> >>> Add support to limit the clock source frequency to the maximum IP >>> supported frequency. Provide these values via SoC chipdata. >>> >>> Signed-off-by: Laxman Dewangan <ldewan...@nvidia.com> >>> >>> --- >>> Changes from V1: >>> - Set the 48MHz maximum frequency for Tegra210 and earlier. >> I think that your changelog needs to be updated, because it still says >> 38.4MHz and not 48MHz. >> > > Oops, thanks for pointing. > > Thierry, > Do I need to recycle the patch or can be corrected when applying? > If there is any further review comment in code then I will recycle and > correct it.
Feel free to add my ... Acked-by: Jon Hunter <jonath...@nvidia.com> Cheers Jon -- nvpublic
