On 04/20, Peter De Schrijver wrote: > PLL SS was only controlled when setting the PLL rate, not when the PLL > itself is enabled or disabled. This means that if the PLL rate was set > before the PLL is enabled, SS will not be enabled, even when configured. > > Signed-off-by: Peter De Schrijver <pdeschrij...@nvidia.com>
Fixes tag? Or this isn't a problem right now, just future fix? -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project
