On Wed, Apr 05, 2017 at 01:50:27PM +0200, Denys Vlasenko wrote:
> Er.... "Change top bits ... ((47 or 56 [bits] depending on paging mode)"?
> I know that's wrong and that's not what you meant to say,
> but it can be read this way too. "47th" instead of "47"
> would eliminate this reading, but you removed "th".
>
> Spell it out to eliminate any chance of confusion:
>
> Change top bits to match most significant bit (47th or 56th bit
> depending on paging mode) in the address.
>
---------------------8<-----------------------
>From 5dec28ba49387ff444e447213b553506e253616d Mon Sep 17 00:00:00 2001
From: "Kirill A. Shutemov" <kirill.shute...@linux.intel.com>
Date: Wed, 5 Apr 2017 14:06:15 +0300
Subject: [PATCH] x86/asm: Fix comment in return_from_SYSCALL_64
On x86-64 __VIRTUAL_MASK_SHIFT depends on paging mode now.
Signed-off-by: Kirill A. Shutemov <kirill.shute...@linux.intel.com>
---
arch/x86/entry/entry_64.S | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/x86/entry/entry_64.S b/arch/x86/entry/entry_64.S
index 607d72c4a485..edec30584eb8 100644
--- a/arch/x86/entry/entry_64.S
+++ b/arch/x86/entry/entry_64.S
@@ -266,7 +266,8 @@ return_from_SYSCALL_64:
* If width of "canonical tail" ever becomes variable, this will need
* to be updated to remain correct on both old and new CPUs.
*
- * Change top 16 bits to be the sign-extension of 47th bit
+ * Change top bits to match most significant bit (47th or 56th bit
+ * depending on paging mode) in the address.
*/
shl $(64 - (__VIRTUAL_MASK_SHIFT+1)), %rcx
sar $(64 - (__VIRTUAL_MASK_SHIFT+1)), %rcx
--
Kirill A. Shutemov
