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Hi Andy,
On Thu, Feb 2, 2017 at 11:47 AM, Andy Shevchenko
<andy.shevche...@gmail.com> wrote:
> On Tue, Jan 31, 2017 at 9:43 PM, Hoan Tran <hot...@apm.com> wrote:
>> Next generation of X-Gene SoC's GPIO hardware register map is very
>> similar to DW GPIO. It only differs by a few register addresses.
>> This patch modifies DW GPIO driver to accommodate the difference
>> in a few register addresses.
>
>> +#define GPIO_REG_OFFSET_V2 1
>> +#define GPIO_INTMASK_V2 0x44
>> +#define GPIO_INTTYPE_LEVEL_V2 0x34
>> +#define GPIO_INT_POLARITY_V2 0x38
>> +#define GPIO_INTSTATUS_V2 0x3c
>> +#define GPIO_PORTA_EOI_V2 0x40
>> +
>
>> static inline u32 dwapb_read(struct dwapb_gpio *gpio, unsigned int offset)
>> {
>> struct gpio_chip *gc = &gpio->ports[0].gc;
>> void __iomem *reg_base = gpio->regs;
>>
>> - return gc->read_reg(reg_base + offset);
>> + return gc->read_reg(reg_base + gpio_reg_convert(gpio, offset));
>
> And what prevents us to introduce special read_reg for that registers?
How could we introduce a special read_reg here? If so, we also have to
have another special write_reg.
> Also what about to convert to regmap API?
Could you guide more how to use regmap in this case? The
gpio_reg_convert() is also used to send the GPIO_PORTA_EOI and
GPIO_INTMASK register offsets to irq_chip.
Thanks
Hoan
>
> --
> With Best Regards,
> Andy Shevchenko
