Hello, On Thu, Jan 12, 2017 at 10:28:20PM +0100, M'boumba Cedric Madianga wrote: > Please see below a quote from datasheet that clearly described how to handle > For 2-byte reception: > ● Wait until ADDR = 1 (SCL stretched low until the ADDR flag is cleared) > ● Set ACK low, set POS high > ● Clear ADDR flag > ● Wait until BTF = 1 (Data 1 in DR, Data2 in shift register, SCL > stretched low until a data1 is read) > ● Set STOP high > ● Read data 1 and 2
The problem is that you only know that you have a 2 byte transfer after you read the first byte (and it's a 1). (But note that this is irrelevant for the patch as the driver doesn't claim to support this kind of transfer.) Best regards Uwe -- Pengutronix e.K. | Uwe Kleine-König | Industrial Linux Solutions | http://www.pengutronix.de/ |
