Hi Peter, On Thu, 17 Nov 2016 14:26:37 +0800 Peter Pan <peterpans...@gmail.com> wrote:
> Hi Boris, > > On Sun, Oct 16, 2016 at 10:35 PM, Boris Brezillon > <boris.brezil...@free-electrons.com> wrote: > > Hi, > > > > This series is aiming at providing a generic NAND layer to share code > > between different NAND based devices. > > > > We currently have 3 different interfaces to interact with NANDs: > > - Raw NANDs > > - OneNANDs > > - SPI NANDs > > > > Apart from the way these NAND devices are accessed they have a lot > > in common, like the way the memory is organized, or their constraints. > > This is usually a good sign that some work should be done to factorize > > the code. > > > > This work has been started by Peter who wanted to re-use the BBT > > code for its SPI-NAND driver. But I think we can push it further > > other stuff (the software ECC implementation, or the way offsets are > > converted to block/page number). > > > > Peter, can you please review/test this version, and if possible, post > > the code you've done to support SPI NANDs. > > > > I already finished review and test work. The BBT works well after I applied > my modification which I already sent to your by email. I tried to build a new > BBT on a new NAND and then mark one block to bad. Both works well. > My test platform is Xilinx Zed board. Thanks a lot for testing and reviewing this series. I'll address your comments and send a new version soon. My plan is to have it in -next just after 4.10-rc1 is released, in order to detect bugs early. > > I will try to rebase my SPI NAND patch on your patch and send it out. > It will take me some time because I'm quite busy with other company affairs. I'd be happy to review this part. Regards, Boris
