On 12 August 2016 at 16:30, Kan Liang <kan.li...@intel.com> wrote: > From: Kan Liang <kan.li...@intel.com> > > The method to build PCI bus to socket mapping is similar among > platforms. However, the PCI location where store Node ID mapping could
I think we should replace "where store" with "which store". > vary for different platforms. For example, the Node ID mapping address > on Skylake server is different as the previous platform. Also, to build I think we should change "as the previous platform" to "from the previous platforms". > the mapping for the PCI bus without UBOX, it has to start from bus 0 on > Skylake server. > > This patch removes the hard code in current implementation, and adds > three parameters for snbep_pci2phy_map_init. So the Node ID mapping > address and bus searching direction could be configured according to > different platforms. > > Signed-off-by: Kan Liang <kan.li...@intel.com> > --- > arch/x86/events/intel/uncore_snbep.c | 37 > ++++++++++++++++++++++++------------ > 1 file changed, 25 insertions(+), 12 deletions(-) > Kan, I have suggested a couple of changes to patch's description above. The main content of the patch seems good to me. -- Nilay
