On Thu, 23 Jun 2016, Zhaoyang Huang wrote:
> On 23 June 2016 at 16:18, Thomas Gleixner <t...@linutronix.de> wrote:
> > On Thu, 23 Jun 2016, Zhaoyang Huang wrote:
> >> On 23 June 2016 at 15:01, Thomas Gleixner <t...@linutronix.de> wrote:
> >> Thomas, I agree with you, I have discussed the modification with the
> >> call back owner. However, I wonder if we can make the idle's framework
> >> to be more precised without the assumption of short CPU_PM_ENTER
> >> callbacks. Thank you!
> >
> > What's the point? To help people who put insanities into the idle code path?
> >
> > Thanks,
> >
> > tglx
> >
> Hi, Thomas. If the entry,exit,min time of one idle state sums up to
> 500us in some platform, the 100us callback which should be common as
> caused by cache miss would also generate 20% imprecision. Don't you
A cache miss is causing a 100us callback? What are you talking about?
Thanks,
tglx
