On Fri, Apr 22, 2016 at 05:27:19PM -0700, Vikas Shivappa wrote: > +static inline void mbm_set_rccount( > + struct perf_event *event, struct rmid_read *rr)
That's horrible style, the 'normal' style is something like: static inline void mbm_set_rccount(struct perf_event *event, struct rmid_read *rr) { } > @@ -1244,8 +1270,16 @@ static u64 intel_cqm_event_count(struct perf_event > *event) > cqm_mask_call(&rr); > > raw_spin_lock_irqsave(&cache_lock, flags); > - if (event->hw.cqm_rmid == rr.rmid) > - local64_set(&event->count, atomic64_read(&rr.value)); > + if (event->hw.cqm_rmid == rr.rmid) { > + if (is_mbm_event(event->attr.config)) { > + tmpval = atomic64_read(&rr.value) + > + local64_read(&event->hw.rc_count); > + > + local64_set(&event->count, tmpval); > + } else { > + local64_set(&event->count, atomic64_read(&rr.value)); > + } > + } > raw_spin_unlock_irqrestore(&cache_lock, flags); > out: > return __perf_event_count(event); This is a 'creative' solution; why don't you do the normal thing, which is: start: prev_count = read_hw_counter(); read: do { prev = prev_count; cur_val = read_hw_counter(); delta = cur_val - prev; } while (local_cmpxchg(&prev_count, prev, cur_val) != prev); count += delta;