On Sun, 2016-04-10 at 11:33 -0700, Greg Kroah-Hartman wrote: > 4.5-stable review patch. If anyone has any objections, please let me know. > > ------------------ > > From: Bjorn Helgaas <bhelg...@google.com> > > commit b84106b4e2290c081cdab521fa832596cdfea246 upstream. > > The PCI config header (first 64 bytes of each device's config space) is > defined by the PCI spec so generic software can identify the device and > manage its usage of I/O, memory, and IRQ resources. > > Some non-spec-compliant devices put registers other than BARs where the > BARs should be. When the PCI core sizes these "BARs", the reads and writes > it does may have unwanted side effects, and the "BAR" may appear to > describe non-sensical address space. > > Add a flag bit to mark non-compliant devices so we don't touch their BARs. > Turn off IO/MEM decoding to prevent the devices from consuming address > space, since we can't read the BARs to find out what that address space > would be. [...]
No objection, but patch 005/238 seems to depend on this so please reorder them so bisection will work. Ben. -- Ben Hutchings This sentence contradicts itself - no actually it doesn't.
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