Hi
I think the MIPS arch_spin_unlock() is borken.
spin_unlock() must have RELEASE semantics, these require that no LOADs
nor STOREs leak out from the critical section.
>From what I know MIPS has a relaxed memory model which allows reads to
pass stores, and as implemented arch_spin_unlock() only issues a wmb
which doesn't order prior reads vs later stores.
Therefore upgrade the wmb() to smp_mb().
(Also, why the unconditional wmb, as opposed to smp_wmb() ?)
Maybe-Signed-off-by: Peter Zijlstra (Intel) <pet...@infradead.org>
---
diff --git a/arch/mips/include/asm/spinlock.h b/arch/mips/include/asm/spinlock.h
index 40196bebe849..b2ca13f06152 100644
--- a/arch/mips/include/asm/spinlock.h
+++ b/arch/mips/include/asm/spinlock.h
@@ -140,7 +140,7 @@ static inline void arch_spin_lock(arch_spinlock_t *lock)
static inline void arch_spin_unlock(arch_spinlock_t *lock)
{
unsigned int serving_now = lock->h.serving_now + 1;
- wmb();
+ smp_mb();
lock->h.serving_now = (u16)serving_now;
nudge_writes();
}
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