On Wed, Dec 06, 2006 at 10:56:14AM -0800, Christoph Lameter wrote: > I'd really appreciate a cmpxchg that is generically available for > all arches. It will allow lockless implementation for various performance > criticial portions of the kernel.
Let's recap on cmpxchg. For CPUs with no atomic operation other than SWP, it is not lockless. For CPUs with load locked + store conditional, it is expensive. I've shown in the past that a generic implementation based around ll/sc can be cheaply implemented using cmpxchg. The reverse is *not* true. If you want an operation for performance critical portions of the kernel, please allow architecture maintainers the freedom to use their best performance enhancements. -- Russell King Linux kernel 2.6 ARM Linux - http://www.arm.linux.org.uk/ maintainer of: - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
