From the 8086 Book,(Osborne/McGraw Hill), circa 1980 (and still the best
reference on entry level real mode 80x86 architexture).
Begin RTFM:
Page 7-4:
NMI is a non-maskable interrupt request input. NMU is an edge triggered input.
Should NMI go from low to high, the 8086 will complete execution of the current
instruction, and then tranfer control to a non-maskable interrupt service
routine. The address of the non-maskable interrupt service routine is present at
memory location 0x0008. Software may not disable this interrupt.
Page 8-32:
Interrupt 2 - NMI (Non-Maskable Interrupt)
This is the highest priority hardware interrupt. As its name would imply, it is
non-maskable. The NMI interrupt request input is edge triggered by a low-to-high
NMI input transition, and is internally synchronized with a low-to-high
transition of the CPU clock signal CLK. NMI must then remain high for at least
two clock periods to guarantee recognition. Since any low-to-high transition of
the NMI can generate an interrupt rewuest, spurious transitions must be suppressed.
If NMI is normally high, it must be low for two CPU clock periods before making
its active low-to-high transition in order to guarantee recognition. This input
is typically reserved for catastrophic interrupt requests, for example,
following a power failure, or if a system watchdog timer times out.
End RTFM.
In the DOS world, according to another ancient text, the NMI was used for RAM
parity and channel errors.
NMI looks like a sort of hardware catch-all for unforseen conditions missed by
the other hardware interrupts, and inadequate user defined harware interrupt
handlers. (Now, where did I leave my old DOS Cosmic Ray handler? And how many of
you, out there, sat by old XT's with radioactive chips, without your leadlined
trousers?)
Cheers,
Dan Feiglin
P.S. Other NMI's:
1. Wife snoring
2. Junior wants a glass of water at 02:00
..
Haim Gelfenbeyn wrote:
> Source of NMI greatly depends on your hardware brand, since NMI is wired
> differently on many motherboards. In my Intel server box, for example,
> NMI can be caused by internal "intstrumentation", or diagnostics (like
> when some fan RPM drops below certain level, or temperature raises). It
> also has NMI pin-hole button on its panel, so I can issue NMI manually,
> although I don't know what for. Look in motherboard manual for info how
> NMI is wired.
>
> Haim
>
>
>> -----Original Message-----
>> From: [EMAIL PROTECTED]
>> [mailto:[EMAIL PROTECTED]] On Behalf Of Nadav Har'El
>> Sent: Sunday, June 17, 2001 6:00 PM
>> To: Cedar Cox
>> Cc: [EMAIL PROTECTED]
>> Subject: Re: NMI?
>>
>>
>> On Sun, Jun 17, 2001, Cedar Cox wrote about "NMI?":
>>
>>> Mar 15 03:36:06 nanu kernel: Uhhuh. NMI received. Dazed and
>>
>> confused, but
>>
>>> trying to continue
>>> Mar 15 03:36:06 nanu kernel: You probably have a hardware
>>
>> problem with
>>
>>> your RAM chips
>>>
>>> As you can see, I got this in my syslog quite a while ago..
>>
>> The server's
>>
>>> been running great and this is the only time I've ever
>>
>> gotten a message
>>
>>> like this. Can anyone shed some light on this? What is NMI?
>>>
>>> -Cedar
>>
>> NMI = "NonMaskable Interrupt". I have no idea what can be causing this
>> (maybe somebody else here knows?) but the kernel's hunch
>> might be correct :(
>>
>> A quick search on Google for "nonmaskable interrupt" provided with the
>> following page:
>> http://www.pcguide.com/ref/mbsys/res/irq/funcNMI-c.html
>>
>> "All of the regular interrupts that we normally use and
>> refer to by
>> number are called maskable interrupts. The processor is
>> able to mask,
>> or temporarily ignore, any interrupt if it needs to, in order to
>> finish something else that it is doing. In addition,
>> however, the PC
>> has a non-maskable interrupt (NMI) that can be used for serious
>> conditions that demand the processor's immediate
>> attention. The NMI
>> cannot be ignored by the system unless it is shut off
>> specifically.
>>
>> When an NMI signal is received, the processor immediately drops
>> whatever it was doing and attends to it. As you can
>> imagine, this
>> could cause havoc if used improperly. In fact, the NMI signal is
>> normally used only for critical problem situations,
>> such as serious
>> hardware errors. The most common use of NMI is to
>> signal a parity
>> error from the memory subsystem. This error must be dealt with
>> immediately to prevent possible data corruption."
>>
>>
>> --
>> Nadav Har'El | Sunday, Jun 17
>> 2001, 26 Sivan 5761
>> [EMAIL PROTECTED]
>> |-----------------------------------------
>> Phone: +972-53-245868, ICQ 13349191 |You have the right to
>> remain silent.
>> http://nadav.harel.org.il |Anything you say will be
>> used against you.
>>
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>>
>
>
>
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