On 2017-12-04 20:40, Rosen Penev wrote: > Qualcomm claims this improves cache efficiency for MIPS. Original commit > message below: > > From: Ben Menchaca <ben.mench...@qca.qualcomm.com> > Date: Fri, 7 Jun 2013 18:35:22 -0500 > Subject: [r4k_mips] efficient cache blast > > Optimize the compiler output for larger cache blast cases that are > common for DMA-based networking. > > Signed-off-by: Ben Menchaca <ben.mench...@qca.qualcomm.com> > Signed-off-by: Rosen Penev <ros...@gmail.com> Merged to my staging tree with some modifications:
- better patch description - moved to generic instead of ar71xx Thanks, - Felix _______________________________________________ Lede-dev mailing list Lede-dev@lists.infradead.org http://lists.infradead.org/mailman/listinfo/lede-dev
