Andre Przywara wrote:
Intel manual 22.3.1.2 demands that the accessed bit (bit 0 in type field)
must be set when on DS,ES,FS and GS when the selector is usable.
This fixes cross vendor migration from AMD to Intel.
I am not sure what the real purpose of this check is, so I put this
in the VMX path and not in the SVM one. If someone has an explanation
which justifies a move, I am happy to do this.
If I understand correctly, loading a segment should set the accessed bit
in the descriptor table (without virtualization there is now way to have
the accessed bit clear in the segment cache), so it looks like the
correct fix is to adjust svm (we already have a couple of similar fixes
there).
--
I have a truly marvellous patch that fixes the bug which this
signature is too narrow to contain.
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