Add the assembler code for three operands
Signed-off-by: Guillaume Thouvenin <[EMAIL PROTECTED]>
---
arch/x86/kvm/x86_emulate.c | 29 +++++++++++++++++++++++++++++
1 files changed, 29 insertions(+), 0 deletions(-)
diff --git a/arch/x86/kvm/x86_emulate.c b/arch/x86/kvm/x86_emulate.c
index 6e23e9c..b6108ad 100644
--- a/arch/x86/kvm/x86_emulate.c
+++ b/arch/x86/kvm/x86_emulate.c
@@ -366,6 +366,35 @@ static u32 group2_table[] = {
"andl %"_msk",%"_LO32 _tmp"; " \
"orl %"_LO32 _tmp",%"_sav"; "
+/* Instruction has three operands */
+/* In the switch we only implement case 4 because we know that for shld
instruction
+ * bytes are equal to 4. When eveything will be fine, we will add others cases.
+ */
+#define
__emulate_3op(_op,_src,_src2,_dst,_eflags,_by,_bx,_wx,_wy,_lx,_ly,_qx,_qy) \
+ do {
\
+ unsigned long _tmp;
\
+
\
+ switch((_dst).bytes) {
\
+ case 4:
\
+ __asm__ __volatile__ (
\
+ _PRE_EFLAGS("0", "5", "2")
\
+ "mov %4, %%rcx \n\t"
\
+ _op" %%cl,%3,%1; \n\t"
\
+ _POST_EFLAGS("0", "5", "2")
\
+ : "=m" (_eflags), "=m" ((_dst).val),
\
+ "=&r" (_tmp)
\
+ : _ly ((_src).val) , _ly ((_src2).val), "i"
(EFLAGS_MASK) \
+ : "%rcx" );
\
+ break;
\
+ default:
\
+ printk(KERN_INFO "__emulate_3op: case need to
be added \n"); \
+ }
\
+ } while (0)
+
+#define emulate_3op(_op, _src, _src2, _dst, _eflags) \
+ __emulate_3op(_op, _src, _src2, _dst, _eflags, \
+ "b", "c", "b", "c", "b", "r", "b", "c")
+
/* Raw emulation: instruction has two explicit operands. */
#define __emulate_2op_nobyte(_op,_src,_dst,_eflags,_wx,_wy,_lx,_ly,_qx,_qy) \
do { \
--
1.6.0.3.514.g2f91b
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