Hi Lu, On Thu, 9 Dec 2021 10:21:38 +0800, Lu Baolu <[email protected]> wrote:
> On 12/9/21 9:56 AM, Tian, Kevin wrote: > >> From: Jacob Pan <[email protected]> > >> Sent: Thursday, December 9, 2021 2:50 AM > >> > >>> Can a device issue DMA requests with PASID even there's no system > >> IOMMU > >>> or the system IOMMU is disabled? > >>> > >> Good point. > >> If IOMMU is not enabled, device cannot issue DMA requests with PASID. > >> This API will not be available. Forgot to add dummy functions to the > >> header. > > > > PASID is a PCI thing, not defined by IOMMU. > > > > I think the key is physically if IOMMU is disabled, how will root > > complex handle a PCI memory request including a PASID TLP prefix? Does > > it block such request due to no IOMMU to consume PASID or simply ignore > > PASID and continue routing the request to the memory controller? > > > > If block, then having an iommu interface makes sense. > > > > If ignore, possibly a DMA API call makes more sense instead, implying > > that this extension can be used even when iommu is disabled. > > > > I think that is what Baolu wants to point out. > Thanks for clarifying, very good point. Looking at the PCIe spec. I don't see specific rules for RC to ignore or block PASID TLP if not enabled. "- A Root Complex that supports PASID TLP Prefixes must have a device specific mechanism for enabling them. By default usage of PASID TLP Prefixes is disabled - Root Complexes may optionally support TLPs with PASID TLP Prefixes. The mechanism used to detect whether a Root Complex supports the PASID TLP Prefix is implementation specific " For all practical purposes, why would someone sets up PASID for DMA just to be ignored? An IOMMU interface makes sense to me. > Yes, exactly. Imagining in the VM guest environment, do we require a > vIOMMU for this functionality? vIOMMU is not performance friendly if we > put aside the security considerations. > The primary use case for accelerators to use in-kernel DMA will be in pass-through mode. vIOMMU should be able to do PT with good performance, right? no nesting, IO page faults. > Best regards, > baolu Thanks, Jacob _______________________________________________ iommu mailing list [email protected] https://lists.linuxfoundation.org/mailman/listinfo/iommu
