> -----Original Message----- > From: Will Deacon [mailto:will.dea...@arm.com] > Sent: Monday, October 06, 2014 4:47 PM > To: Sethi Varun-B16395 > Cc: iommu@lists.linux-foundation.org > Subject: Re: [RFC][PATCH 2/2] Add support of the IOMMU_DEVICE flag. > > On Mon, Oct 06, 2014 at 11:28:16AM +0100, Varun Sethi wrote: > > This flag is used for specifying access to device memory. SMMU would > > apply device memory attributes for a DMA transaction. This is required > > for setting access to GIC registers, for generating message > > interrupts. This would ensure that transactions targetting device memory are > not gathered or reordered. > > > > Signed-off-by: Varun Sethi <varun.se...@freescale.com> > > --- > > drivers/iommu/arm-smmu.c | 7 +++++++ > > 1 file changed, 7 insertions(+) > > > > diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c index > > ca18d6d..f8338d6 100644 > > --- a/drivers/iommu/arm-smmu.c > > +++ b/drivers/iommu/arm-smmu.c > > @@ -1263,6 +1263,10 @@ static int arm_smmu_alloc_init_pte(struct > arm_smmu_device *smmu, pmd_t *pmd, > > if (prot & IOMMU_CACHE) > > pteval |= (MAIR_ATTR_IDX_CACHE << > > ARM_SMMU_PTE_ATTRINDX_SHIFT); > > + > > + if (prot & IOMMU_DEVICE) > > + pteval |= (MAIR_ATTR_IDX_DEV << > > + ARM_SMMU_PTE_ATTRINDX_SHIFT); > > This is slightly odd, as I could in theory pass IOMMU_CACHE | IOMMU_DEVICE > to iommu_map. Agreed, this should only be relevant for the non-cacheable case.
-Varun _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu
