Hi Varun,

[adding the Qualcomm guys, as I have an open question below]

On Mon, Oct 06, 2014 at 11:28:15AM +0100, Varun Sethi wrote:
> This is used for indicating device memory type for a DMA transaction. IOMMU
> driver would set up attributes indicationg access to device memory.
> 
> Signed-off-by: Varun Sethi <varun.se...@freescale.com>
> ---
>  include/linux/iommu.h |    1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/include/linux/iommu.h b/include/linux/iommu.h
> index 20f9a52..0599fe1 100644
> --- a/include/linux/iommu.h
> +++ b/include/linux/iommu.h
> @@ -28,6 +28,7 @@
>  #define IOMMU_WRITE  (1 << 1)
>  #define IOMMU_CACHE  (1 << 2) /* DMA cache coherency */
>  #define IOMMU_EXEC   (1 << 3)
> +#define IOMMU_DEVICE (1 << 4) /* Indicates access to device memory */

An alternative to this would be to make device-memory the default type for
!IOMMU_CACHE mappings (i.e. MAIR index 0).

I'd value feedback either way; the argument comes down to whether we should
use normal non-cacheable or device-nGnRE as the default (!IOMMU_CACHE) memory
type. The latter is likely to be significantly slower, but provides the
ordering guarantees that you need for MSI delivery.

If we do go down the route of adding a new IOMMU_* option, it probably needs
a better name (IOMMU_MMIO, for example).

Will
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