[Intel-wired-lan] [PATCH v2 iwl-net 1/4] ice: Fix E825 initialization

[Karol Kolacinski]

Current implementation checks revision of all PHYs on all PFs, which is
incorrect and may result in initialization failure. Check only the
revision of the current PHY.

Fixes: 7cab44f1c35f ("ice: Introduce ETH56G PHY model for E825C products")
Reviewed-by: Arkadiusz Kubalewski <arkadiusz.kubalew...@intel.com>
Signed-off-by: Karol Kolacinski <karol.kolacin...@intel.com>
---
V1 -> V2: Removed net-next hunks

 drivers/net/ethernet/intel/ice/ice_ptp_hw.c | 22 ++++++++-------------
 drivers/net/ethernet/intel/ice/ice_ptp_hw.h |  3 ++-
 2 files changed, 10 insertions(+), 15 deletions(-)

diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c 
b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c
index 3a33e6b9b313..d9a3c7de0342 100644
--- a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c
+++ b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c
@@ -2665,14 +2665,15 @@ static bool ice_is_muxed_topo(struct ice_hw *hw)
 }
 
 /**
- * ice_ptp_init_phy_e825c - initialize PHY parameters
+ * ice_ptp_init_phy_e825 - initialize PHY parameters
  * @hw: pointer to the HW struct
  */
-static void ice_ptp_init_phy_e825c(struct ice_hw *hw)
+static void ice_ptp_init_phy_e825(struct ice_hw *hw)
 {
        struct ice_ptp_hw *ptp = &hw->ptp;
        struct ice_eth56g_params *params;
-       u8 phy;
+       u32 phy_rev;
+       int err;
 
        ptp->phy_model = ICE_PHY_ETH56G;
        params = &ptp->phy.eth56g;
@@ -2686,16 +2687,9 @@ static void ice_ptp_init_phy_e825c(struct ice_hw *hw)
        ptp->num_lports = params->num_phys * ptp->ports_per_phy;
 
        ice_sb_access_ena_eth56g(hw, true);
-       for (phy = 0; phy < params->num_phys; phy++) {
-               u32 phy_rev;
-               int err;
-
-               err = ice_read_phy_eth56g(hw, phy, PHY_REG_REVISION, &phy_rev);
-               if (err || phy_rev != PHY_REVISION_ETH56G) {
-                       ptp->phy_model = ICE_PHY_UNSUP;
-                       return;
-               }
-       }
+       err = ice_read_phy_eth56g(hw, hw->pf_id, PHY_REG_REVISION, &phy_rev);
+       if (err || phy_rev != PHY_REVISION_ETH56G)
+               ptp->phy_model = ICE_PHY_UNSUP;
 
        ptp->is_2x50g_muxed_topo = ice_is_muxed_topo(hw);
 }
@@ -5396,7 +5390,7 @@ void ice_ptp_init_hw(struct ice_hw *hw)
        else if (ice_is_e810(hw))
                ice_ptp_init_phy_e810(ptp);
        else if (ice_is_e825c(hw))
-               ice_ptp_init_phy_e825c(hw);
+               ice_ptp_init_phy_e825(hw);
        else
                ptp->phy_model = ICE_PHY_UNSUP;
 }
diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.h 
b/drivers/net/ethernet/intel/ice/ice_ptp_hw.h
index 0852a34ade91..35141198f261 100644
--- a/drivers/net/ethernet/intel/ice/ice_ptp_hw.h
+++ b/drivers/net/ethernet/intel/ice/ice_ptp_hw.h
@@ -326,7 +326,8 @@ extern const struct ice_vernier_info_e82x 
e822_vernier[NUM_ICE_PTP_LNK_SPD];
  */
 #define ICE_E810_PLL_FREQ              812500000
 #define ICE_PTP_NOMINAL_INCVAL_E810    0x13b13b13bULL
-#define E810_OUT_PROP_DELAY_NS 1
+#define ICE_E810_OUT_PROP_DELAY_NS     1
+#define ICE_E825_SYNC_DELAY            6
 
 /* Device agnostic functions */
 u8 ice_get_ptp_src_clock_index(struct ice_hw *hw);
-- 
2.46.2