From: Deepak M <m.dee...@intel.com>
Currently all gpio indices we support (via the gpio table) fall in NC
anyway, but prepare for bigger indices.
[Rewritten by Jani, based on earlier work by Deepak.]
Signed-off-by: Deepak M <m.dee...@intel.com>
Signed-off-by: Jani Nikula <jani.nik...@intel.com>
---
drivers/gpu/drm/i915/intel_dsi_panel_vbt.c | 16 ++++++++++++++--
1 file changed, 14 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
index 3c6275f85ae2..040ec5d6a7ac 100644
--- a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
+++ b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
@@ -58,6 +58,10 @@ static inline struct vbt_panel *to_vbt_panel(struct
drm_panel *panel)
#define NS_KHZ_RATIO 1000000
+#define VLV_IOSF_MAX_GPIO_NUM_NC 26
+#define VLV_IOSF_MAX_GPIO_NUM_SC 128
+#define VLV_IOSF_MAX_GPIO_NUM 172
+
#define VLV_GPIO_NC_0_HV_DDI0_HPD 0x4130
#define VLV_GPIO_NC_1_HV_DDI0_DDC_SDA 0x4120
#define VLV_GPIO_NC_2_HV_DDI0_DDC_SCL 0x4110
@@ -198,8 +202,16 @@ static void vlv_exec_gpio(struct drm_i915_private
*dev_priv,
}
if (dev_priv->vbt.dsi.seq_version >= 3) {
- DRM_DEBUG_KMS("GPIO element v3 not supported\n");
- return;
+ if (gpio_index <= VLV_IOSF_MAX_GPIO_NUM_NC) {
+ port = IOSF_PORT_GPIO_NC;
+ } else if (gpio_index <= VLV_IOSF_MAX_GPIO_NUM_SC) {
+ port = IOSF_PORT_GPIO_SC;
+ } else if (gpio_index <= VLV_IOSF_MAX_GPIO_NUM) {
+ port = IOSF_PORT_GPIO_SUS;
+ } else {
+ DRM_DEBUG_KMS("invalid gpio index %u\n", gpio_index);
+ return;
+ }
} else if (dev_priv->vbt.dsi.seq_version == 2) {
if (gpio_source == 0) {
port = IOSF_PORT_GPIO_NC;
--
2.1.4
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