Use for_each_crtc_state to only touch affected crtc's.
In order to make sure that the initial power is still set
correctly we make sure modeset_update_crtc_power_domains is called
during the initial modeset.

Signed-off-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 44 ++++++++++++++++++++++++------------
 1 file changed, 29 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index de975ef09e23..942d25e7490a 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5197,30 +5197,35 @@ static unsigned long get_crtc_power_domains(struct 
drm_crtc *crtc)
        return mask;
 }
 
-static void modeset_update_crtc_power_domains(struct drm_atomic_state *state)
+static void modeset_update_crtc_power_domains(struct drm_atomic_state *state,
+                                             bool power_only)
 {
        struct drm_device *dev = state->dev;
        struct drm_i915_private *dev_priv = dev->dev_private;
-       unsigned long pipe_domains[I915_MAX_PIPES] = { 0, };
-       struct intel_crtc *crtc;
+       unsigned long pipe_domains[I915_MAX_PIPES] = { 0, }, domains;
+       struct drm_crtc_state *crtc_state;
+       struct drm_crtc *crtc;
+       int i;
 
        /*
         * First get all needed power domains, then put all unneeded, to avoid
         * any unnecessary toggling of the power wells.
         */
-       for_each_intel_crtc(dev, crtc) {
+       for_each_crtc_in_state(state, crtc, crtc_state, i) {
                enum intel_display_power_domain domain;
+               enum pipe pipe = to_intel_crtc(crtc)->pipe;
 
-               if (!crtc->base.state->enable)
+               if (!crtc->state->active)
                        continue;
 
-               pipe_domains[crtc->pipe] = get_crtc_power_domains(&crtc->base);
+               domains = pipe_domains[pipe] = get_crtc_power_domains(crtc);
+               domains &= ~to_intel_crtc(crtc)->enabled_power_domains;
 
-               for_each_power_domain(domain, pipe_domains[crtc->pipe])
+               for_each_power_domain(domain, domains)
                        intel_display_power_get(dev_priv, domain);
        }
 
-       if (dev_priv->display.modeset_commit_cdclk) {
+       if (!power_only && dev_priv->display.modeset_commit_cdclk) {
                unsigned int cdclk = to_intel_atomic_state(state)->cdclk;
 
                if (cdclk != dev_priv->cdclk_freq &&
@@ -5228,16 +5233,19 @@ static void modeset_update_crtc_power_domains(struct 
drm_atomic_state *state)
                        dev_priv->display.modeset_commit_cdclk(state);
        }
 
-       for_each_intel_crtc(dev, crtc) {
+       for_each_crtc_in_state(state, crtc, crtc_state, i) {
+               struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
+               enum pipe pipe = intel_crtc->pipe;
                enum intel_display_power_domain domain;
 
-               for_each_power_domain(domain, crtc->enabled_power_domains)
-                       intel_display_power_put(dev_priv, domain);
+               domains = intel_crtc->enabled_power_domains;
+               domains &= ~pipe_domains[pipe];
 
-               crtc->enabled_power_domains = pipe_domains[crtc->pipe];
-       }
+               intel_crtc->enabled_power_domains = pipe_domains[pipe];
 
-       intel_display_set_init_power(dev_priv, false);
+               for_each_power_domain(domain, domains)
+                       intel_display_power_put(dev_priv, domain);
+       }
 }
 
 static void intel_update_max_cdclk(struct drm_device *dev)
@@ -13115,7 +13123,7 @@ static int __intel_set_mode(struct drm_atomic_state 
*state)
        /* The state has been swaped above, so state actually contains the
         * old state now. */
        if (any_ms)
-               modeset_update_crtc_power_domains(state);
+               modeset_update_crtc_power_domains(state, false);
 
        /* Now enable the clocks, plane, pipe, and connectors that we set up. */
        for_each_crtc_in_state(state, crtc, crtc_state, i) {
@@ -15606,6 +15614,7 @@ intel_modeset_setup_hw_state(struct drm_device *dev, 
bool force_restore)
                return NULL;
        }
 
+       /* swap sw/hw state */
        drm_atomic_helper_swap_state(dev, state);
 
        if (force_restore) {
@@ -15619,6 +15628,9 @@ intel_modeset_setup_hw_state(struct drm_device *dev, 
bool force_restore)
                to_intel_atomic_state(state)->dpll_set = false;
        }
 
+       /* update power state to match hw state */
+       modeset_update_crtc_power_domains(state, true);
+
        /* HW state is read out, now we need to sanitize this mess. */
        for_each_intel_encoder(dev, encoder) {
                intel_sanitize_encoder(encoder);
@@ -15697,6 +15709,8 @@ intel_modeset_setup_hw_state(struct drm_device *dev, 
bool force_restore)
                drm_atomic_state_free(state);
        }
 
+       intel_display_set_init_power(dev_priv, false);
+
        intel_modeset_check_state(dev);
        return NULL;
 }
-- 
2.1.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Reply via email to