On Mon, Feb 09, 2015 at 07:25:56PM +0000, Damien Lespiau wrote:
> v2: Reorder defines (Ben)
Bikeshed time?
> /* WaCatErrorRejectionIssue */
> #define GEN7_SQ_CHICKEN_MBCUNIT_CONFIG 0x9030
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c
> b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index 46486a5..a9cde64 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -790,9 +790,11 @@ static int bdw_init_workarounds(struct intel_engine_cs
> *ring)
> */
> /* WaForceEnableNonCoherent:bdw */
> /* WaHdcDisableFetchWhenMasked:bdw */
> + /* WaForceContextSaveRestoreNonCoherent:bdw */
> /* WaDisableFenceDestinationToSLM:bdw (GT3 pre-production) */
> WA_SET_BIT_MASKED(HDC_CHICKEN0,
> HDC_FORCE_NON_COHERENT |
> + HDC_FORCE_CONTEXT_SAVE_RESTORE_NON_COHERENT |
> HDC_DONOT_FETCH_MEM_WHEN_MASKED |
> (IS_BDW_GT3(dev) ? HDC_FENCE_DEST_SLM_DISABLE : 0));
This is nicer as:
WA_SET_BIT_MASKED(HDC_CHICKEN0,
/* WaForceEnableNonCoherent:bdw */
HDC_FORCE_NON_COHERENT |
+ /* WaForceContextSaveRestoreNonCoherent:bdw */
+ HDC_FORCE_CONTEXT_SAVE_RESTORE_NON_COHERENT |
/* WaHdcDisableFetchWhenMasked:bdw */
HDC_DONOT_FETCH_MEM_WHEN_MASKED |
/* WaDisableFenceDestinationToSLM:bdw (GT3
pre-production) */
(IS_BDW_GT3(dev) ? HDC_FENCE_DEST_SLM_DISABLE : 0));
Indeed, that shows that you misorded your comment! ;-)
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
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