struct drm_i915_file_private {
struct drm_i915_private *dev_priv;
@@ -3019,19 +3036,4 @@ wait_remaining_ms_from_jiffies(unsigned long
timestamp_jiffies, int to_wait_ms)
}
}
-static inline bool i915_gem_request_completed(struct drm_i915_gem_request *req,
- bool lazy_coherency)
-{
- u32 seqno;
-
- BUG_ON(req == NULL);
-
- if (req->ring == NULL)
- return false;
-
- seqno = req->ring->get_seqno(req->ring, lazy_coherency);
-
- return i915_seqno_passed(seqno, req->seqno);
-}
-
#endif
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 0f14333..0a9b29e 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2641,6 +2641,27 @@ void i915_gem_reset(struct drm_device *dev)
i915_gem_restore_fences(dev);
}
+void i915_gem_complete_requests_ring(struct intel_engine_cs *ring,
+ bool lazy_coherency)
+{
+ struct drm_i915_gem_request *req;
+ u32 seqno;
+
+ seqno = ring->get_seqno(ring, lazy_coherency);
+ if (seqno == ring->last_read_seqno)
+ return;
+
+ list_for_each_entry(req, &ring->request_list, list) {
+ if (req->complete)
+ continue;
+
+ if (i915_seqno_passed(seqno, req->seqno))
+ req->complete = true;
+ }
+
+ ring->last_read_seqno = seqno;
+}
+
/**
* This function clears the request list as sequence numbers are passed.
*/
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 744684a..57acd2a 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -808,6 +808,7 @@ static int logical_ring_alloc_seqno(struct intel_engine_cs
*ring,
kref_init(&request->ref);
request->ring = NULL;
+ request->complete = false;
ret = i915_gem_get_seqno(ring->dev, &request->seqno);
if (ret) {
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c
b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 0a3c24a..392dc25 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -2023,6 +2023,7 @@ intel_ring_alloc_seqno(struct intel_engine_cs *ring)
kref_init(&request->ref);
request->ring = NULL;
+ request->complete = false;
ret = i915_gem_get_seqno(ring->dev, &request->seqno);
if (ret) {
@@ -2115,6 +2116,7 @@ void intel_ring_init_seqno(struct intel_engine_cs *ring,
u32 seqno)
I915_WRITE(RING_SYNC_2(ring->mmio_base), 0);
}
+ ring->last_read_seqno = 0;
ring->set_seqno(ring, seqno);
ring->hangcheck.seqno = seqno;
}
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h
b/drivers/gpu/drm/i915/intel_ringbuffer.h
index 64a4346..40394d3 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -269,6 +269,9 @@ struct intel_engine_cs {
bool gpu_caches_dirty;
bool fbc_dirty;
+ /* For optimising request completion events */
+ u32 last_read_seqno;
+
wait_queue_head_t irq_queue;
struct intel_context *default_context;
--
1.7.9.5
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