On Fri, Sep 19, 2014 at 04:05:08PM +0300, Mika Kuoppala wrote: > as these have been fixed in production hw and hurt performance > if applied. > > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=83482 > Tested-by: zhoujian <jianx.z...@intel.com> > Signed-off-by: Mika Kuoppala <mika.kuopp...@intel.com> > --- > drivers/gpu/drm/i915/intel_ringbuffer.c | 13 +------------ > 1 file changed, 1 insertion(+), 12 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c > b/drivers/gpu/drm/i915/intel_ringbuffer.c > index 681ea86..dfb3bc6 100644 > --- a/drivers/gpu/drm/i915/intel_ringbuffer.c > +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c > @@ -722,19 +722,8 @@ static int bdw_init_workarounds(struct intel_engine_cs > *ring) > intel_ring_emit_wa(ring, GEN7_ROW_CHICKEN2, > _MASKED_BIT_ENABLE(DOP_CLOCK_GATING_DISABLE)); > > - /* > - * This GEN8_CENTROID_PIXEL_OPT_DIS W/A is only needed for > - * pre-production hardware > - */ > intel_ring_emit_wa(ring, HALF_SLICE_CHICKEN3, > - _MASKED_BIT_ENABLE(GEN8_CENTROID_PIXEL_OPT_DIS > - | GEN8_SAMPLER_POWER_BYPASS_DIS)); > - > - intel_ring_emit_wa(ring, GEN7_HALF_SLICE_CHICKEN1, > - > _MASKED_BIT_ENABLE(GEN7_SINGLE_SUBSCAN_DISPATCH_ENABLE)); > - > - intel_ring_emit_wa(ring, COMMON_SLICE_CHICKEN2, > - > _MASKED_BIT_ENABLE(GEN8_CSC2_SBE_VUE_CACHE_CONSERVATIVE)); > + _MASKED_BIT_ENABLE(GEN8_SAMPLER_POWER_BYPASS_DIS));
You should adjust the requested ring space too. Looks like this will leave the number of intel_ring_emit_wa() calls even so no need to worry about the QW tail padding quite yet. > > /* Use Force Non-Coherent whenever executing a 3D context. This is a > * workaround for for a possible hang in the unlikely event a TLB > -- > 1.9.1 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Ville Syrjälä Intel OTC _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
