Introduce a helper to compute the max link wake latency when using
Auxless/Aux wake mechanism for PSR/Panel Replay/LOBF features.
This will be used to compute the minimum guardband so that the link wake
latencies are accounted and these features work smoothly for higher
refresh rate panels.
Bspec: 70151, 71477
Signed-off-by: Ankit Nautiyal <ankit.k.nauti...@intel.com>
Reviewed-by: Mitul Golani <mitulkumar.ajitkumar.gol...@intel.com>
---
drivers/gpu/drm/i915/display/intel_alpm.c | 15 +++++++++++++++
drivers/gpu/drm/i915/display/intel_alpm.h | 2 ++
2 files changed, 17 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c
b/drivers/gpu/drm/i915/display/intel_alpm.c
index dfdde8e4eabe..42b4a0ceb53b 100644
--- a/drivers/gpu/drm/i915/display/intel_alpm.c
+++ b/drivers/gpu/drm/i915/display/intel_alpm.c
@@ -628,3 +628,18 @@ bool intel_alpm_get_error(struct intel_dp *intel_dp)
return false;
}
+
+int intel_alpm_compute_max_link_wake_latency(struct intel_crtc_state
*crtc_state,
+ bool assume_all_enabled)
+{
+ int psr2_vblank_time = 0;
+ int auxless_wake_time = 0;
+
+ if (assume_all_enabled || crtc_state->has_sel_update)
+ psr2_vblank_time = io_buffer_wake_time(crtc_state);
+
+ if (assume_all_enabled || crtc_state->has_panel_replay)
+ auxless_wake_time =
_lnl_compute_aux_less_wake_time(crtc_state->port_clock);
+
+ return max(psr2_vblank_time, auxless_wake_time);
+}
diff --git a/drivers/gpu/drm/i915/display/intel_alpm.h
b/drivers/gpu/drm/i915/display/intel_alpm.h
index a861c20b5d79..8f1db54eecf5 100644
--- a/drivers/gpu/drm/i915/display/intel_alpm.h
+++ b/drivers/gpu/drm/i915/display/intel_alpm.h
@@ -38,4 +38,6 @@ bool intel_alpm_is_alpm_aux_less(struct intel_dp *intel_dp,
const struct intel_crtc_state *crtc_state);
void intel_alpm_disable(struct intel_dp *intel_dp);
bool intel_alpm_get_error(struct intel_dp *intel_dp);
+int intel_alpm_compute_max_link_wake_latency(struct intel_crtc_state
*crtc_state,
+ bool assume_all_enabled);
#endif
--
2.45.2
