We want to get rid of triggering "Frame Change" events from
frontbuffer flush calls. We are about to move using TRANS_PUSH
register for this on LunarLake and onwards. Touching TRANS_PUSH
register from fronbuffer flush would be problematic as it's written by
DSB as well.

Fix this by using intel_psr_exit when flush or invalidate is done on
LunarLake and onwards. This is not possible on AlderLake and
MeteorLake due to HW bug in PSR2 disable.

Signed-off-by: Jouni Högander <jouni.hogan...@intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 14 +++++++++-----
 1 file changed, 9 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c 
b/drivers/gpu/drm/i915/display/intel_psr.c
index cd833b63ea6b..3d637d92ca89 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -3250,7 +3250,9 @@ static void intel_psr_configure_full_frame_update(struct 
intel_dp *intel_dp)
 
 static void _psr_invalidate_handle(struct intel_dp *intel_dp)
 {
-       if (intel_dp->psr.psr2_sel_fetch_enabled) {
+       struct intel_display *display = to_intel_display(intel_dp);
+
+       if (DISPLAY_VER(display) < 20 && intel_dp->psr.psr2_sel_fetch_enabled) {
                if (!intel_dp->psr.psr2_sel_fetch_cff_enabled) {
                        intel_dp->psr.psr2_sel_fetch_cff_enabled = true;
                        intel_psr_configure_full_frame_update(intel_dp);
@@ -3338,7 +3340,7 @@ static void _psr_flush_handle(struct intel_dp *intel_dp)
        struct intel_display *display = to_intel_display(intel_dp);
        struct drm_i915_private *dev_priv = to_i915(display->drm);
 
-       if (intel_dp->psr.psr2_sel_fetch_enabled) {
+       if (DISPLAY_VER(display) < 20 && intel_dp->psr.psr2_sel_fetch_enabled) {
                if (intel_dp->psr.psr2_sel_fetch_cff_enabled) {
                        /* can we turn CFF off? */
                        if (intel_dp->psr.busy_frontbuffer_bits == 0)
@@ -3355,11 +3357,13 @@ static void _psr_flush_handle(struct intel_dp *intel_dp)
                 * existing SU configuration
                 */
                intel_psr_configure_full_frame_update(intel_dp);
-       }
 
-       intel_psr_force_update(intel_dp);
+               intel_psr_force_update(intel_dp);
+       } else {
+               intel_psr_exit(intel_dp);
+       }
 
-       if (!intel_dp->psr.psr2_sel_fetch_enabled && !intel_dp->psr.active &&
+       if ((!intel_dp->psr.psr2_sel_fetch_enabled || DISPLAY_VER(display) >= 
20) &&
            !intel_dp->psr.busy_frontbuffer_bits)
                queue_work(dev_priv->unordered_wq, &intel_dp->psr.work);
 }
-- 
2.43.0

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