On Lunarlake and onwards it is possible to generate "PSR frame change"
event using TRANS_PUSH mechanism. Implement function to enable this and
take PSR into account in intel_vrr_send_push. Also use
intel_vrr_send_push in intel_psr_trigger_frame_change_event.
v3:
- use rmw when enabling/disabling
- keep LNL_TRANS_PUSH_PSR_PR_EN set always on LunarLake and onwards
v2: use intel_vrr_trans_push_enabled_set_clear instead of rmw
Signed-off-by: Jouni Högander <jouni.hogan...@intel.com>
---
drivers/gpu/drm/i915/display/intel_psr.c | 10 +++++++
drivers/gpu/drm/i915/display/intel_vrr.c | 33 +++++++++++++++++-------
drivers/gpu/drm/i915/display/intel_vrr.h | 1 +
3 files changed, 35 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
b/drivers/gpu/drm/i915/display/intel_psr.c
index 3d637d92ca89..5ba46f808c1a 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1966,6 +1966,9 @@ static void intel_psr_enable_source(struct intel_dp
*intel_dp,
intel_dmc_block_pkgc(display, intel_dp->psr.pipe, true);
intel_alpm_configure(intel_dp, crtc_state);
+
+ if (DISPLAY_VER(display) >= 20)
+ intel_vrr_psr_frame_change_enable(crtc_state);
}
static bool psr_interrupt_error_check(struct intel_dp *intel_dp)
@@ -2350,11 +2353,18 @@ void intel_psr_trigger_frame_change_event(struct
intel_dsb *dsb,
{
const struct intel_crtc_state *crtc_state =
intel_pre_commit_crtc_state(state, crtc);
+ const struct intel_crtc_state *new_crtc_state =
+ intel_atomic_get_new_crtc_state(state, crtc);
struct intel_display *display = to_intel_display(crtc);
if (crtc_state->has_psr)
+ return;
+
+ if (DISPLAY_VER(display) < 20)
intel_de_write_dsb(display, dsb,
CURSURFLIVE(display, crtc->pipe), 0);
+ else
+ intel_vrr_send_push(dsb, new_crtc_state);
}
/**
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c
b/drivers/gpu/drm/i915/display/intel_vrr.c
index c55b8144e234..4120e58de35a 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -505,16 +505,22 @@ void intel_vrr_send_push(struct intel_dsb *dsb,
{
struct intel_display *display = to_intel_display(crtc_state);
enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
+ u32 trans_push;
- if (!crtc_state->vrr.enable)
+ if (!crtc_state->vrr.enable && (DISPLAY_VER(display) < 20 ||
+ !crtc_state->has_psr))
return;
if (dsb)
intel_dsb_nonpost_start(dsb);
- intel_de_write_dsb(display, dsb,
- TRANS_PUSH(display, cpu_transcoder),
- TRANS_PUSH_EN | TRANS_PUSH_SEND);
+ trans_push = TRANS_PUSH_EN | TRANS_PUSH_SEND;
+
+ if (DISPLAY_VER(display) >= 20 && crtc_state->has_psr)
+ trans_push |= LNL_TRANS_PUSH_PSR_PR_EN;
+
+ intel_de_write_dsb(display, dsb, TRANS_PUSH(display, cpu_transcoder),
+ trans_push);
if (dsb)
intel_dsb_nonpost_end(dsb);
@@ -559,7 +565,8 @@ bool intel_vrr_is_push_sent(const struct intel_crtc_state
*crtc_state)
struct intel_display *display = to_intel_display(crtc_state);
enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
- if (!crtc_state->vrr.enable)
+ if (!crtc_state->vrr.enable && (DISPLAY_VER(display) < 20 ||
+ !crtc_state->has_psr))
return false;
return intel_de_read(display, TRANS_PUSH(display, cpu_transcoder)) &
TRANS_PUSH_SEND;
@@ -609,9 +616,7 @@ void intel_vrr_enable(const struct intel_crtc_state
*crtc_state)
crtc_state->vrr.vmax - 1);
intel_de_write(display, TRANS_VRR_FLIPLINE(display, cpu_transcoder),
crtc_state->vrr.flipline - 1);
-
- intel_de_write(display, TRANS_PUSH(display, cpu_transcoder),
- TRANS_PUSH_EN);
+ intel_de_rmw(display, TRANS_PUSH(display, cpu_transcoder), 0,
TRANS_PUSH_EN);
if (!intel_vrr_always_use_vrr_tg(display)) {
intel_vrr_set_db_point_and_transmission_line(crtc_state);
@@ -627,6 +632,15 @@ void intel_vrr_enable(const struct intel_crtc_state
*crtc_state)
}
}
+void intel_vrr_psr_frame_change_enable(const struct intel_crtc_state
*crtc_state)
+{
+ struct intel_display *display = to_intel_display(crtc_state);
+ enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
+
+ intel_de_rmw(display, TRANS_VRR_CTL(display, cpu_transcoder), 0,
+ LNL_TRANS_PUSH_PSR_PR_EN);
+}
+
void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state)
{
struct intel_display *display = to_intel_display(old_crtc_state);
@@ -641,7 +655,8 @@ void intel_vrr_disable(const struct intel_crtc_state
*old_crtc_state)
intel_de_wait_for_clear(display,
TRANS_VRR_STATUS(display,
cpu_transcoder),
VRR_STATUS_VRR_EN_LIVE, 1000);
- intel_de_write(display, TRANS_PUSH(display, cpu_transcoder), 0);
+ intel_de_rmw(display, TRANS_PUSH(display, cpu_transcoder),
+ TRANS_PUSH_EN, 0);
}
intel_vrr_set_fixed_rr_timings(old_crtc_state);
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.h
b/drivers/gpu/drm/i915/display/intel_vrr.h
index 38bf9996b883..6f815fd05c36 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.h
+++ b/drivers/gpu/drm/i915/display/intel_vrr.h
@@ -30,6 +30,7 @@ void intel_vrr_check_push_sent(struct intel_dsb *dsb,
const struct intel_crtc_state *crtc_state);
bool intel_vrr_is_push_sent(const struct intel_crtc_state *crtc_state);
void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state);
+void intel_vrr_psr_frame_change_enable(const struct intel_crtc_state
*crtc_state);
void intel_vrr_get_config(struct intel_crtc_state *crtc_state);
int intel_vrr_vmax_vtotal(const struct intel_crtc_state *crtc_state);
int intel_vrr_vmin_vtotal(const struct intel_crtc_state *crtc_state);
--
2.43.0
