On Tue, 2025-02-18 at 23:19 +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrj...@linux.intel.com>
>
> Hoist the dbuf stuff into a separate function from
> intel_crtc_disable_noatomic_complete() so that the details
> are better hidden inside skl_watermark.c.
>
> We can also skip the whole thing on pre-skl since the dbuf state
> isn't actually used on those platforms. The readout path does
> still fill dbuf_state->active_pipes but we'll remedy that later.
>
> Signed-off-by: Ville Syrjälä <ville.syrj...@linux.intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_modeset_setup.c | 5 +----
> drivers/gpu/drm/i915/display/skl_watermark.c | 13 +++++++++++++
> drivers/gpu/drm/i915/display/skl_watermark.h | 2 ++
> 3 files changed, 16 insertions(+), 4 deletions(-)
>
That pre-skl check on the new extracted function seemed a bit out of place for
this specific change.
But anyway not a big blocker for me.
Reviewed-by: Vinod Govindapillai <vinod.govindapil...@intel.com>
> diff --git a/drivers/gpu/drm/i915/display/intel_modeset_setup.c
> b/drivers/gpu/drm/i915/display/intel_modeset_setup.c
> index 826998909045..10a2421f7c50 100644
> --- a/drivers/gpu/drm/i915/display/intel_modeset_setup.c
> +++ b/drivers/gpu/drm/i915/display/intel_modeset_setup.c
> @@ -158,8 +158,6 @@ static void intel_crtc_disable_noatomic_complete(struct
> intel_crtc *crtc)
> struct drm_i915_private *i915 = to_i915(crtc->base.dev);
> struct intel_bw_state *bw_state =
> to_intel_bw_state(i915->display.bw.obj.state);
> - struct intel_dbuf_state *dbuf_state =
> - to_intel_dbuf_state(i915->display.dbuf.obj.state);
> struct intel_pmdemand_state *pmdemand_state =
> to_intel_pmdemand_state(i915->display.pmdemand.obj.state);
> struct intel_crtc_state *crtc_state =
> @@ -178,8 +176,7 @@ static void intel_crtc_disable_noatomic_complete(struct
> intel_crtc *crtc)
> intel_display_power_put_all_in_set(display,
> &crtc->enabled_power_domains);
>
> intel_cdclk_crtc_disable_noatomic(crtc);
> -
> - dbuf_state->active_pipes &= ~BIT(pipe);
> + skl_wm_crtc_disable_noatomic(crtc);
>
> bw_state->data_rate[pipe] = 0;
> bw_state->num_active_planes[pipe] = 0;
> diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c
> b/drivers/gpu/drm/i915/display/skl_watermark.c
> index 10a1daad28eb..4930e52322d3 100644
> --- a/drivers/gpu/drm/i915/display/skl_watermark.c
> +++ b/drivers/gpu/drm/i915/display/skl_watermark.c
> @@ -3845,6 +3845,19 @@ static void skl_wm_get_hw_state_and_sanitize(struct
> drm_i915_private *i915)
> skl_dbuf_sanitize(i915);
> }
>
> +void skl_wm_crtc_disable_noatomic(struct intel_crtc *crtc)
> +{
> + struct intel_display *display = to_intel_display(crtc);
> + struct intel_dbuf_state *dbuf_state =
> + to_intel_dbuf_state(display->dbuf.obj.state);
> + enum pipe pipe = crtc->pipe;
> +
> + if (DISPLAY_VER(display) < 9)
> + return;
> +
> + dbuf_state->active_pipes &= ~BIT(pipe);
> +}
> +
> void intel_wm_state_verify(struct intel_atomic_state *state,
> struct intel_crtc *crtc)
> {
> diff --git a/drivers/gpu/drm/i915/display/skl_watermark.h
> b/drivers/gpu/drm/i915/display/skl_watermark.h
> index c5547485225a..8c07c11135c7 100644
> --- a/drivers/gpu/drm/i915/display/skl_watermark.h
> +++ b/drivers/gpu/drm/i915/display/skl_watermark.h
> @@ -41,6 +41,8 @@ bool skl_ddb_allocation_overlaps(const struct skl_ddb_entry
> *ddb,
> void intel_wm_state_verify(struct intel_atomic_state *state,
> struct intel_crtc *crtc);
>
> +void skl_wm_crtc_disable_noatomic(struct intel_crtc *crtc);
> +
> void skl_watermark_ipc_init(struct drm_i915_private *i915);
> void skl_watermark_ipc_update(struct drm_i915_private *i915);
> bool skl_watermark_ipc_enabled(struct drm_i915_private *i915);
