Currently VRR timing generator is used only when VRR is enabled by
userspace for sinks that support VRR. From MTL+ gradually move away from
the older timing generator and use VRR timing generator for both variable
and fixed timings.

Signed-off-by: Ankit Nautiyal <ankit.k.nauti...@intel.com>
---
 drivers/gpu/drm/i915/display/intel_vrr.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c 
b/drivers/gpu/drm/i915/display/intel_vrr.c
index 975fed9930c1..b16d277e78c5 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -543,7 +543,9 @@ bool intel_vrr_always_use_vrr_tg(struct intel_display 
*display)
        if (!HAS_VRR(display))
                return false;
 
-       /* #TODO return true for platforms supporting fixed_rr */
+       if (DISPLAY_VER(display) >= 14)
+               return true;
+
        return false;
 }
 
-- 
2.45.2

Reply via email to