Update the intel_set_transcoder_timings_lrr() function to use fixed refresh rate timings for platforms which always use VRR timing generator.
Signed-off-by: Ankit Nautiyal <ankit.k.nauti...@intel.com> --- drivers/gpu/drm/i915/display/intel_display.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index c9d1c091b109..36e35c577caa 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -2922,6 +2922,7 @@ static void intel_set_transcoder_timings(const struct intel_crtc_state *crtc_sta static void intel_set_transcoder_timings_lrr(const struct intel_crtc_state *crtc_state) { + struct intel_display *display = to_intel_display(crtc_state); struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; @@ -2967,6 +2968,9 @@ static void intel_set_transcoder_timings_lrr(const struct intel_crtc_state *crtc intel_de_write(dev_priv, TRANS_VTOTAL(dev_priv, cpu_transcoder), VACTIVE(crtc_vdisplay - 1) | VTOTAL(crtc_vtotal - 1)); + + if (intel_vrr_always_use_vrr_tg(display)) + intel_vrr_enable_fixed_rr_timings(crtc_state); } static void intel_set_pipe_src_size(const struct intel_crtc_state *crtc_state) -- 2.45.2