On Fri, Mar 21, 2014 at 06:05:04PM +0530, sourab.gu...@intel.com wrote: > From: Akash Goel <akash.g...@intel.com> > > This patch Enables the bit for TLB invalidate in GFX Mode register. > > According to bspec, When enabled this bit limits the invalidation > of the TLB only to batch buffer boundaries, to pipe_control > commands which have the TLB invalidation bit set and sync flushes. > If disabled, the TLB caches are flushed for every full flush of > the pipeline.
So why do we want to not disable it? -Chris -- Chris Wilson, Intel Open Source Technology Centre _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
