[Intel-gfx] [PATCH] tests/gem_gtt_hog: Fix for BDW

[Rodrigo Vivi]

Update XY_COLOR_BLT command for Broadwell.

v2: stash devid and remove ugly double allocation. (by Chris).

Cc: Chris Wilson ch...@chris-wilson.co.uk>
Signed-off-by: Rodrigo Vivi <rodrigo.v...@gmail.com>
---
 tests/gem_gtt_hog.c | 24 +++++++++++++++++-------
 1 file changed, 17 insertions(+), 7 deletions(-)

diff --git a/tests/gem_gtt_hog.c b/tests/gem_gtt_hog.c
index 53cd7eb..4198a94 100644
--- a/tests/gem_gtt_hog.c
+++ b/tests/gem_gtt_hog.c
@@ -57,17 +57,25 @@ static void busy(int fd, uint32_t handle, int size, int 
loops)
        struct drm_i915_gem_execbuffer2 execbuf;
        struct drm_i915_gem_pwrite gem_pwrite;
        struct drm_i915_gem_create create;
-       uint32_t buf[122], *b;
-       int i;
+       uint32_t buf[170], *b;
+       int i, b_size;
+       int devid = intel_get_drm_devid(fd);
 
        memset(reloc, 0, sizeof(reloc));
        memset(gem_exec, 0, sizeof(gem_exec));
        memset(&execbuf, 0, sizeof(execbuf));
 
+       b_size = devid >= 8 ? 170 : 122;
        b = buf;
        for (i = 0; i < 20; i++) {
-               *b++ = XY_COLOR_BLT_CMD_NOLEN | 4 |
-                       COLOR_BLT_WRITE_ALPHA | XY_COLOR_BLT_WRITE_RGB;
+               if (devid >= 8) {
+                       *b++ = MI_NOOP;
+                       *b++ = XY_COLOR_BLT_CMD_NOLEN | 4 |
+                               COLOR_BLT_WRITE_ALPHA | XY_COLOR_BLT_WRITE_RGB;
+               } else {
+                       *b++ = XY_COLOR_BLT_CMD_NOLEN | 5 |
+                               COLOR_BLT_WRITE_ALPHA | XY_COLOR_BLT_WRITE_RGB;
+               }
                *b++ = 0xf0 << 16 | 1 << 25 | 1 << 24 | 4096;
                *b++ = 0;
                *b++ = size >> 12 << 16 | 1024;
@@ -76,6 +84,8 @@ static void busy(int fd, uint32_t handle, int size, int loops)
                reloc[i].read_domains = I915_GEM_DOMAIN_RENDER;
                reloc[i].write_domain = I915_GEM_DOMAIN_RENDER;
                *b++ = 0;
+               if (devid >= 8)
+                       *b++ = 0;
                *b++ = canary;
        }
        *b++ = MI_BATCH_BUFFER_END;
@@ -93,14 +103,14 @@ static void busy(int fd, uint32_t handle, int size, int 
loops)
 
        execbuf.buffers_ptr = (uintptr_t)gem_exec;
        execbuf.buffer_count = 2;
-       execbuf.batch_len = sizeof(buf);
+       execbuf.batch_len = b_size;
        execbuf.flags = 1 << 11;
-       if (HAS_BLT_RING(intel_get_drm_devid(fd)))
+       if (HAS_BLT_RING(devid))
                execbuf.flags |= I915_EXEC_BLT;
 
        gem_pwrite.handle = gem_exec[1].handle;
        gem_pwrite.offset = 0;
-       gem_pwrite.size = sizeof(buf);
+       gem_pwrite.size = b_size;
        gem_pwrite.data_ptr = (uintptr_t)buf;
        if (drmIoctl(fd, DRM_IOCTL_I915_GEM_PWRITE, &gem_pwrite) == 0) {
                while (loops--)
-- 
1.8.3.1

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