From: Lucas De Marchi <lucas.demar...@intel.com>

XeHP SDV is a Intel® dGPU without display. This is just the definition
of some basic platform macros, by large a copy of current state of
Tigerlake which does not reflect the end state of this platform.

v2:
 - Switch to intel_step infrastructure for stepping matches. (Jani)

Bspec: 44467, 48077
Cc: Rodrigo Vivi <rodrigo.v...@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demar...@intel.com>
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospu...@intel.com>
Signed-off-by: José Roberto de Souza <jose.so...@intel.com>
Signed-off-by: Stuart Summers <stuart.summ...@intel.com>
Signed-off-by: Tomas Winkler <tomas.wink...@intel.com>
Signed-off-by: Matt Roper <matthew.d.ro...@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h          |  4 ++++
 drivers/gpu/drm/i915/i915_pci.c          | 20 ++++++++++++++++++++
 drivers/gpu/drm/i915/intel_device_info.c |  1 +
 drivers/gpu/drm/i915/intel_device_info.h |  1 +
 drivers/gpu/drm/i915/intel_step.c        | 12 +++++++++++-
 drivers/gpu/drm/i915/intel_step.h        |  1 +
 6 files changed, 38 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index effb555d14f5..24181aa36efb 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1453,6 +1453,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
 #define IS_DG1(dev_priv)        IS_PLATFORM(dev_priv, INTEL_DG1)
 #define IS_ALDERLAKE_S(dev_priv) IS_PLATFORM(dev_priv, INTEL_ALDERLAKE_S)
 #define IS_ALDERLAKE_P(dev_priv) IS_PLATFORM(dev_priv, INTEL_ALDERLAKE_P)
+#define IS_XEHPSDV(dev_priv) IS_PLATFORM(dev_priv, INTEL_XEHPSDV)
 #define IS_HSW_EARLY_SDV(dev_priv) (IS_HASWELL(dev_priv) && \
                                    (INTEL_DEVID(dev_priv) & 0xFF00) == 0x0C00)
 #define IS_BDW_ULT(dev_priv) \
@@ -1611,6 +1612,9 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
        (IS_ALDERLAKE_P(__i915) && \
         IS_GT_STEP(__i915, since, until))
 
+#define IS_XEHPSDV_GT_STEP(p, since, until) \
+       (IS_XEHPSDV(p) && IS_GT_STEP(__i915, since, until))
+
 #define IS_LP(dev_priv)                (INTEL_INFO(dev_priv)->is_lp)
 #define IS_GEN9_LP(dev_priv)   (GRAPHICS_VER(dev_priv) == 9 && IS_LP(dev_priv))
 #define IS_GEN9_BC(dev_priv)   (GRAPHICS_VER(dev_priv) == 9 && 
!IS_LP(dev_priv))
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 65cbab1c1a15..07c57d8f3a9c 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -1020,6 +1020,26 @@ static const struct intel_device_info adl_p_info = {
        .ppgtt_size = 48, \
        .ppgtt_type = INTEL_PPGTT_FULL
 
+#define XE_HPM_FEATURES \
+       .media_ver = 12, \
+       .media_rel = 50
+
+__maybe_unused
+static const struct intel_device_info xehpsdv_info = {
+       XE_HP_FEATURES,
+       XE_HPM_FEATURES,
+       DGFX_FEATURES,
+       PLATFORM(INTEL_XEHPSDV),
+       .display = { },
+       .pipe_mask = 0,
+       .platform_engine_mask =
+               BIT(RCS0) | BIT(BCS0) |
+               BIT(VECS0) | BIT(VECS1) | BIT(VECS2) | BIT(VECS3) |
+               BIT(VCS0) | BIT(VCS1) | BIT(VCS2) | BIT(VCS3) |
+               BIT(VCS4) | BIT(VCS5) | BIT(VCS6) | BIT(VCS7),
+       .require_force_probe = 1,
+};
+
 #undef PLATFORM
 
 /*
diff --git a/drivers/gpu/drm/i915/intel_device_info.c 
b/drivers/gpu/drm/i915/intel_device_info.c
index d2a514d2551d..b750f9ded9d5 100644
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -68,6 +68,7 @@ static const char * const platform_names[] = {
        PLATFORM_NAME(DG1),
        PLATFORM_NAME(ALDERLAKE_S),
        PLATFORM_NAME(ALDERLAKE_P),
+       PLATFORM_NAME(XEHPSDV),
 };
 #undef PLATFORM_NAME
 
diff --git a/drivers/gpu/drm/i915/intel_device_info.h 
b/drivers/gpu/drm/i915/intel_device_info.h
index 75c69cfb11f2..690a0d2812bb 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -88,6 +88,7 @@ enum intel_platform {
        INTEL_DG1,
        INTEL_ALDERLAKE_S,
        INTEL_ALDERLAKE_P,
+       INTEL_XEHPSDV,
        INTEL_MAX_PLATFORMS
 };
 
diff --git a/drivers/gpu/drm/i915/intel_step.c 
b/drivers/gpu/drm/i915/intel_step.c
index ba9479a67521..a27a41caed70 100644
--- a/drivers/gpu/drm/i915/intel_step.c
+++ b/drivers/gpu/drm/i915/intel_step.c
@@ -54,6 +54,13 @@ static const struct intel_step_info adlp_revid_step_tbl[] = {
        [0xC] = { .gt_step = STEP_C0, .display_step = STEP_D0 },
 };
 
+static const struct intel_step_info xehpsdv_revid_step_tbl[] = {
+       [0x0] = { .gt_step = STEP_A0 },
+       [0x1] = { .gt_step = STEP_A1 },
+       [0x4] = { .gt_step = STEP_B0 },
+       [0x8] = { .gt_step = STEP_C0 },
+};
+
 void intel_step_init(struct drm_i915_private *i915)
 {
        const struct intel_step_info *revids = NULL;
@@ -61,7 +68,10 @@ void intel_step_init(struct drm_i915_private *i915)
        int revid = INTEL_REVID(i915);
        struct intel_step_info step = {};
 
-       if (IS_ALDERLAKE_P(i915)) {
+       if (IS_XEHPSDV(i915)) {
+               revids = xehpsdv_revid_step_tbl;
+               size = ARRAY_SIZE(xehpsdv_revid_step_tbl);
+       } else if (IS_ALDERLAKE_P(i915)) {
                revids = adlp_revid_step_tbl;
                size = ARRAY_SIZE(adlp_revid_step_tbl);
        } else if (IS_ALDERLAKE_S(i915)) {
diff --git a/drivers/gpu/drm/i915/intel_step.h 
b/drivers/gpu/drm/i915/intel_step.h
index 958a8bb5d677..8efacef6ab31 100644
--- a/drivers/gpu/drm/i915/intel_step.h
+++ b/drivers/gpu/drm/i915/intel_step.h
@@ -22,6 +22,7 @@ struct intel_step_info {
 enum intel_step {
        STEP_NONE = 0,
        STEP_A0,
+       STEP_A1,
        STEP_A2,
        STEP_B0,
        STEP_B1,
-- 
2.25.4

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