[Intel-gfx] [PATCH 04/15] drm/i915: Extract hsw_ddi_{enable, disable}_clock()

[Ville Syrjala]

From: Ville Syrjälä <ville.syrj...@linux.intel.com>

Yank out the HSW/BDW code from intel_ddi_clk_{select,disable}()
and put it into the new encoder .{enable,disable}_clock() vfuncs.

Signed-off-by: Ville Syrjälä <ville.syrj...@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_ddi.c | 32 +++++++++++++++++++-----
 1 file changed, 26 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c 
b/drivers/gpu/drm/i915/display/intel_ddi.c
index da8bb9a2de0b..b46d7be1996b 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -3433,9 +3433,6 @@ static void intel_ddi_clk_select(struct intel_encoder 
*encoder,
 
                intel_de_write(dev_priv, DPLL_CTRL2, val);
 
-       } else if (INTEL_GEN(dev_priv) < 9) {
-               intel_de_write(dev_priv, PORT_CLK_SEL(port),
-                              hsw_pll_to_ddi_pll_sel(pll));
        }
 
        mutex_unlock(&dev_priv->dpll.lock);
@@ -3458,12 +3455,30 @@ static void intel_ddi_clk_disable(struct intel_encoder 
*encoder)
        } else if (IS_GEN9_BC(dev_priv)) {
                intel_de_write(dev_priv, DPLL_CTRL2,
                               intel_de_read(dev_priv, DPLL_CTRL2) | 
DPLL_CTRL2_DDI_CLK_OFF(port));
-       } else if (INTEL_GEN(dev_priv) < 9) {
-               intel_de_write(dev_priv, PORT_CLK_SEL(port),
-                              PORT_CLK_SEL_NONE);
        }
 }
 
+static void hsw_ddi_enable_clock(struct intel_encoder *encoder,
+                                const struct intel_crtc_state *crtc_state)
+{
+       struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+       const struct intel_shared_dpll *pll = crtc_state->shared_dpll;
+       enum port port = encoder->port;
+
+       if (drm_WARN_ON(&dev_priv->drm, !pll))
+               return;
+
+       intel_de_write(dev_priv, PORT_CLK_SEL(port), 
hsw_pll_to_ddi_pll_sel(pll));
+}
+
+static void hsw_ddi_disable_clock(struct intel_encoder *encoder)
+{
+       struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+       enum port port = encoder->port;
+
+       intel_de_write(dev_priv, PORT_CLK_SEL(port), PORT_CLK_SEL_NONE);
+}
+
 static void intel_ddi_enable_clock(struct intel_encoder *encoder,
                                   const struct intel_crtc_state *crtc_state)
 {
@@ -5610,6 +5625,11 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, 
enum port port)
        encoder->cloneable = 0;
        encoder->pipe_mask = ~0;
 
+       if (IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv)) {
+               encoder->enable_clock = hsw_ddi_enable_clock;
+               encoder->disable_clock = hsw_ddi_disable_clock;
+       }
+
        if (IS_DG1(dev_priv))
                encoder->hpd_pin = dg1_hpd_pin(dev_priv, port);
        else if (IS_ROCKETLAKE(dev_priv))
-- 
2.26.2

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