On Wed, Oct 21, 2020 at 01:20:34AM -0700, Lucas De Marchi wrote: > From: Swathi Dhanavanthri <swathi.dhanavant...@intel.com> > > Set GS Timer to 224. > Bspec: 53508 > > Cc: Matt Roper <matthew.d.ro...@intel.com> > Signed-off-by: Swathi Dhanavanthri <swathi.dhanavant...@intel.com> > Signed-off-by: Lucas De Marchi <lucas.demar...@intel.com> > --- > drivers/gpu/drm/i915/gt/intel_workarounds.c | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c > b/drivers/gpu/drm/i915/gt/intel_workarounds.c > index 8d24ea769fe6..cd0c5847e2df 100644 > --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c > +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c > @@ -684,6 +684,11 @@ static void dg1_ctx_workarounds_init(struct > intel_engine_cs *engine, > /* Wa_22010493298 */ > WA_SET_BIT_MASKED(HIZ_CHICKEN, > DG1_HZ_READ_SUPPRESSION_OPTIMIZATION_DISABLE); > + > + /* Wa_16011163337 */ > + wa_add(wal, > + FF_MODE2, > + FF_MODE2_GS_TIMER_MASK, FF_MODE2_GS_TIMER_224, 0);
It looks like with the latest bspec updates we can just move this into gen12_ctx_workarounds_init() (and remove the copy in the tgl_ function); it now applies to all platforms that will be using that function. Matt > } > > static void > -- > 2.28.0 > -- Matt Roper Graphics Software Engineer VTT-OSGC Platform Enablement Intel Corporation (916) 356-2795 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
