On Wed, May 29, 2019 at 03:21:01PM +0530, Swati Sharma wrote:
> In this patch, hw gamma blob is created for ILK.
>
> v4: -No need to initialize *blob [Jani]
> -Removed right shifts [Jani]
> -Dropped dev local var [Jani]
> v5: -Returned blob instead of assigning it internally within the
> function [Ville]
> -Renamed ilk_get_color_config() to ilk_read_luts() [Ville]
>
> Signed-off-by: Swati Sharma <swati2.sha...@intel.com>
> ---
> drivers/gpu/drm/i915/i915_reg.h | 3 +++
> drivers/gpu/drm/i915/intel_color.c | 42
> ++++++++++++++++++++++++++++++++++++--
> 2 files changed, 43 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 249296b..d5ff323 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -7189,6 +7189,9 @@ enum {
> /* ilk/snb precision palette */
> #define _PREC_PALETTE_A 0x4b000
> #define _PREC_PALETTE_B 0x4c000
> +#define PREC_PALETTE_RED_MASK REG_GENMASK(29, 20)
> +#define PREC_PALETTE_GREEN_MASK REG_GENMASK(19, 10)
> +#define PREC_PALETTE_BLUE_MASK REG_GENMASK(9, 0)
> #define PREC_PALETTE(pipe, i) _MMIO(_PIPE(pipe, _PREC_PALETTE_A,
> _PREC_PALETTE_B) + (i) * 4)
>
> #define _PREC_PIPEAGCMAX 0x4d000
> diff --git a/drivers/gpu/drm/i915/intel_color.c
> b/drivers/gpu/drm/i915/intel_color.c
> index 6e6e54b..7568b13 100644
> --- a/drivers/gpu/drm/i915/intel_color.c
> +++ b/drivers/gpu/drm/i915/intel_color.c
> @@ -1650,6 +1650,43 @@ static void ivb_read_luts(struct intel_crtc_state
> *crtc_state)
> crtc_state->base.gamma_lut = ivb_read_lut_10(crtc_state,
> PAL_PREC_INDEX_VALUE(0));
> }
>
> +static struct drm_property_blob *
> +ilk_read_gamma_lut(struct intel_crtc_state *crtc_state)
ilk_read_lut_10()
> +{
> + struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
> + struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> + u32 i, val, lut_size = INTEL_INFO(dev_priv)->color.gamma_lut_size;
> + enum pipe pipe = crtc->pipe;
> + struct drm_property_blob *blob;
> + struct drm_color_lut *blob_data;
> +
> + blob = drm_property_create_blob(&dev_priv->drm,
> + sizeof(struct drm_color_lut) * lut_size,
> + NULL);
> + if (IS_ERR(blob))
> + return NULL;
> +
> + blob_data = blob->data;
> +
> + for (i = 0; i < lut_size - 1; i++) {
> + val = I915_READ(PREC_PALETTE(pipe, i));
> +
> + blob_data[i].red =
> intel_color_lut_pack(REG_FIELD_GET(PREC_PALETTE_RED_MASK, val), 10);
> + blob_data[i].green =
> intel_color_lut_pack(REG_FIELD_GET(PREC_PALETTE_GREEN_MASK, val), 10);
> + blob_data[i].blue =
> intel_color_lut_pack(REG_FIELD_GET(PREC_PALETTE_BLUE_MASK, val), 10);
> + }
> +
> + return blob;
> +}
> +
> +static void ilk_read_luts(struct intel_crtc_state *crtc_state)
> +{
> + if (crtc_state->gamma_mode == GAMMA_MODE_MODE_8BIT)
> + crtc_state->base.gamma_lut = i9xx_read_lut_8(crtc_state);
> + else
> + crtc_state->base.gamma_lut = ilk_read_gamma_lut(crtc_state);
> +}
> +
> void intel_color_init(struct intel_crtc *crtc)
> {
> struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> @@ -1703,9 +1740,10 @@ void intel_color_init(struct intel_crtc *crtc)
> } else if (INTEL_GEN(dev_priv) >= 7) {
> dev_priv->display.load_luts = ivb_load_luts;
> dev_priv->display.read_luts = ivb_read_luts;
> - }
> - else
> + } else {
> dev_priv->display.load_luts = ilk_load_luts;
> + dev_priv->display.read_luts = ilk_read_luts;
> + }
> }
>
> drm_crtc_enable_color_mgmt(&crtc->base,
> --
> 1.9.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Ville Syrjälä
Intel
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