In this patch, gamma and degamma hw blobs are created for IVB.

v4: -No need to initialize *blob [Jani]
    -Removed right shifts [Jani]
    -Dropped dev local var [Jani]
v5: -Returned blob instead of assigning it internally within the
     function [Ville]
    -Renamed ivb_get_color_config() to ivb_read_luts() [Ville]

Signed-off-by: Swati Sharma <swati2.sha...@intel.com>
---
 drivers/gpu/drm/i915/intel_color.c | 49 ++++++++++++++++++++++++++++++++++++--
 1 file changed, 47 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_color.c 
b/drivers/gpu/drm/i915/intel_color.c
index b349932..6e6e54b 100644
--- a/drivers/gpu/drm/i915/intel_color.c
+++ b/drivers/gpu/drm/i915/intel_color.c
@@ -1606,6 +1606,50 @@ static void bdw_read_luts(struct intel_crtc_state 
*crtc_state)
                crtc_state->base.gamma_lut = bdw_read_lut_10(crtc_state, 
PAL_PREC_INDEX_VALUE(0));
 }
 
+static struct drm_property_blob *
+ivb_read_lut_10(struct intel_crtc_state *crtc_state, u32 prec_index)
+{
+       struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
+       struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+       int hw_lut_size = ivb_lut_10_size(prec_index);
+       enum pipe pipe = crtc->pipe;
+       struct drm_property_blob *blob;
+       struct drm_color_lut *blob_data;
+       u32 i, val;
+
+       blob = drm_property_create_blob(&dev_priv->drm,
+                                       sizeof(struct drm_color_lut) * 
hw_lut_size,
+                                       NULL);
+       if (IS_ERR(blob))
+               return NULL;
+
+       blob_data = blob->data;
+
+       for (i = 0; i < hw_lut_size; i++) {
+               I915_WRITE(PREC_PAL_INDEX(pipe), prec_index++);
+               val = I915_READ(PREC_PAL_DATA(pipe));
+
+               blob_data[i].red = 
intel_color_lut_pack(REG_FIELD_GET(PREC_PAL_DATA_RED_MASK, val), 10);
+               blob_data[i].green = 
intel_color_lut_pack(REG_FIELD_GET(PREC_PAL_DATA_GREEN_MASK, val), 10);
+               blob_data[i].blue = 
intel_color_lut_pack(REG_FIELD_GET(PREC_PAL_DATA_BLUE_MASK, val), 10);
+       }
+
+       I915_WRITE(PREC_PAL_INDEX(pipe), 0);
+
+       return blob;
+}
+
+static void ivb_read_luts(struct intel_crtc_state *crtc_state)
+{
+       if (crtc_state->gamma_mode == GAMMA_MODE_MODE_8BIT)
+               crtc_state->base.gamma_lut = i9xx_read_lut_8(crtc_state);
+       else if (crtc_state->gamma_mode == GAMMA_MODE_MODE_SPLIT)
+               crtc_state->base.gamma_lut = ivb_read_lut_10(crtc_state, 
PAL_PREC_SPLIT_MODE |
+                                                            
PAL_PREC_INDEX_VALUE(512));
+       else
+               crtc_state->base.gamma_lut = ivb_read_lut_10(crtc_state, 
PAL_PREC_INDEX_VALUE(0));
+}
+
 void intel_color_init(struct intel_crtc *crtc)
 {
        struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
@@ -1656,9 +1700,10 @@ void intel_color_init(struct intel_crtc *crtc)
                } else if (INTEL_GEN(dev_priv) >= 8) {
                        dev_priv->display.load_luts = bdw_load_luts;
                        dev_priv->display.read_luts = bdw_read_luts;
-               }
-               else if (INTEL_GEN(dev_priv) >= 7)
+               } else if (INTEL_GEN(dev_priv) >= 7) {
                        dev_priv->display.load_luts = ivb_load_luts;
+                       dev_priv->display.read_luts = ivb_read_luts;
+               }
                else
                        dev_priv->display.load_luts = ilk_load_luts;
        }
-- 
1.9.1

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