This patch implements a helper function for enabling
or disabling TE interrupts.
Signed-off-by: Madhav Chauhan <madhav.chau...@intel.com>
---
drivers/gpu/drm/i915/icl_dsi.c | 20 ++++++++++++++++++++
drivers/gpu/drm/i915/intel_drv.h | 2 ++
2 files changed, 22 insertions(+)
diff --git a/drivers/gpu/drm/i915/icl_dsi.c b/drivers/gpu/drm/i915/icl_dsi.c
index bf7ad5e..0ae62a1 100644
--- a/drivers/gpu/drm/i915/icl_dsi.c
+++ b/drivers/gpu/drm/i915/icl_dsi.c
@@ -46,6 +46,26 @@ struct intel_encoder *gen11_dsi_find_cmd_mode_encoder(struct
intel_crtc *crtc)
return NULL;
}
+void gen11_dsi_configure_te_interrupt(struct intel_encoder *encoder,
+ bool enable)
+{
+ struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
+ struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
+ u32 tmp;
+ enum port port;
+
+ for_each_dsi_port(port, intel_dsi->ports) {
+ tmp = I915_READ(GEN8_DE_PORT_IMR);
+ if (enable)
+ tmp |= (port == PORT_A ? ICL_DSI0_TE : ICL_DSI1_TE);
+ else
+ tmp &= (port == PORT_A ? ~ICL_DSI0_TE : ~ICL_DSI1_TE);
+
+ I915_WRITE(GEN8_DE_PORT_IMR, tmp);
+ POSTING_READ(GEN8_DE_PORT_IMR);
+ }
+}
+
static void wait_for_dsi_hdr_credit_release(struct intel_dsi *intel_dsi,
enum transcoder dsi_trans)
{
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 7dadfc1..e39f812 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1757,6 +1757,8 @@ void vlv_dsi_init(struct drm_i915_private *dev_priv);
/* icl_dsi.c */
void intel_gen11_dsi_init(struct drm_i915_private *dev_priv);
struct intel_encoder *gen11_dsi_find_cmd_mode_encoder(struct intel_crtc *crtc);
+void gen11_dsi_configure_te_interrupt(struct intel_encoder *encoder,
+ bool enable);
/* intel_dsi_dcs_backlight.c */
int intel_dsi_dcs_init_backlight_funcs(struct intel_connector
*intel_connector);
--
2.7.4
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