This patch configures DSI transcoder behavior when operating
in command mode.
Signed-off-by: Madhav Chauhan <madhav.chau...@intel.com>
---
drivers/gpu/drm/i915/i915_reg.h | 1 +
drivers/gpu/drm/i915/icl_dsi.c | 4 ++++
2 files changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 81dc656..de671f2 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -10447,6 +10447,7 @@ enum skl_power_gate {
#define CMD_MODE_TE_GATE 0x1
#define VIDEO_MODE_SYNC_EVENT 0x2
#define VIDEO_MODE_SYNC_PULSE 0x3
+#define TE_SOURCE_GPIO (1 << 27)
#define LINK_READY (1 << 20)
#define PIX_FMT(x) (x << 16)
#define PIX_FMT_MASK (0x3 << 16)
diff --git a/drivers/gpu/drm/i915/icl_dsi.c b/drivers/gpu/drm/i915/icl_dsi.c
index a175349..b189398 100644
--- a/drivers/gpu/drm/i915/icl_dsi.c
+++ b/drivers/gpu/drm/i915/icl_dsi.c
@@ -625,6 +625,10 @@ static void gen11_dsi_configure_transcoder(struct
intel_encoder *encoder,
} else {
DRM_ERROR("DSI Video Mode unsupported\n");
}
+ } else { /* command mode */
+ tmp &= ~OP_MODE_MASK;
+ tmp |= OP_MODE(CMD_MODE_TE_GATE);
+ tmp |= TE_SOURCE_GPIO;
}
I915_WRITE(DSI_TRANS_FUNC_CONF(dsi_trans), tmp);
--
2.7.4
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