Disable CGPSF unit clock gating to prevent an issue.

v2: Rebased on top of the WA refactoring
v3: Added References (Mika)
v4:
  - Rebased
  - C, not lisp (Chris)
  - Remove unintentional whitespaces (Mika)
  - Fixed in C0 (Mika)

References: HSDES#1406838659
Signed-off-by: Oscar Mateo <oscar.ma...@intel.com>
Reviewed-by: Mika Kuoppala <mika.kuopp...@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_reg.h          | 3 +++
 drivers/gpu/drm/i915/intel_workarounds.c | 6 ++++++
 2 files changed, 9 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 7cb2ddc..ce48427 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -3848,6 +3848,9 @@ enum {
 #define UNSLICE_UNIT_LEVEL_CLKGATE     _MMIO(0x9434)
 #define  VFUNIT_CLKGATE_DIS            (1 << 20)
 
+#define INF_UNIT_LEVEL_CLKGATE         _MMIO(0x9560)
+#define   CGPSF_CLKGATE_DIS            (1 << 3)
+
 /*
  * Display engine regs
  */
diff --git a/drivers/gpu/drm/i915/intel_workarounds.c 
b/drivers/gpu/drm/i915/intel_workarounds.c
index 2a4e3ee..942d322 100644
--- a/drivers/gpu/drm/i915/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/intel_workarounds.c
@@ -755,6 +755,12 @@ static void icl_gt_workarounds_apply(struct 
drm_i915_private *dev_priv)
        I915_WRITE(GEN10_L3_CHICKEN_MODE_REGISTER,
                   I915_READ(GEN10_L3_CHICKEN_MODE_REGISTER) |
                   GEN11_I2M_WRITE_DISABLE);
+
+       /* Wa_1406838659:icl (pre-prod) */
+       if (IS_ICL_REVID(dev_priv, ICL_REVID_A0, ICL_REVID_B0))
+               I915_WRITE(INF_UNIT_LEVEL_CLKGATE,
+                          I915_READ(INF_UNIT_LEVEL_CLKGATE) |
+                          CGPSF_CLKGATE_DIS);
 }
 
 void intel_gt_workarounds_apply(struct drm_i915_private *dev_priv)
-- 
1.9.1

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