Re: [Intel-gfx] [PATCH v3 13/18] drm/i915/hsw, bdw: Add irq_pipe_mask, has_vga power well attributes

[Arkadiusz Hiler]

On Wed, Jul 12, 2017 at 06:54:13PM +0300, Imre Deak wrote:
> The pattern of a power well backing a set of pipe IRQ or VGA
> functionality applies to all HSW+ platforms. Using power well attributes
> instead of platform checks to decide whether to init/reset pipe IRQs and
> VGA correspondingly is cleaner and it allows us to unify the HSW/BDW and
> GEN9+ power well code in follow-up patches.
> 
> Also use u8 for pipe_mask in related helpers to match the type in the
> power well struct.
> 
> v2:
> - Use u8 instead of u32 for irq_pipe_mask. (Ville)
> 
> v3:
> - Use u8 for pipe_mask in related helpers too for clarity.
> 
> Signed-off-by: Imre Deak <imre.d...@intel.com>
Reviewed-by: Arkadiusz Hiler <arkadiusz.hi...@intel.com>
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx