On Tue, 09 Aug 2011 10:02:54 -0700 Keith Packard <kei...@keithp.com> wrote:
> On Tue, 9 Aug 2011 09:29:20 -0700, Jesse Barnes <jbar...@virtuousgeek.org> > wrote: > > > - I915_WRITE(GEN6_PMIMR, 0); > > + I915_WRITE(GEN6_PMIMR, ~GEN6_PM_DEFERRED_EVENTS); > > spin_unlock_irq(&dev_priv->rps_lock); > > - /* enable all PM interrupts */ > > - I915_WRITE(GEN6_PMINTRMSK, 0); > > + /* Enable only those we respond to in the deferred work handler */ > > + I915_WRITE(GEN6_PMINTRMSK, GEN6_PMINTR_DEFERRED_EVENTS); > > I think this is supposed to only enable the DEFERRED_EVENTS, right? In > which case, I think you want to invert that (as 0 enables and 1 disables): > > + I915_WRITE(GEN6_PMINTRMSK, ~GEN6_PMINTR_DEFERRED_EVENTS); > > just like you did for the PMIMR register? Yeah it went from 0 to just a few bits, but it should have been the ~ of that, you're right. Will fix & test and resend. -- Jesse Barnes, Intel Open Source Technology Center _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
